M34282M2 View Datasheet(PDF) - Renesas Electronics

Part Name

Description

Manufacturer

M34282M2

SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER

Renesas Electronics 

4282 Group

(2) Functional outline

In the PROM mode, data is transferred with the clock-

synchronous serial input/output. The input data is read through

the SDA pin into the internal circuit synchronously with the

rising edge of the serial clock pulse. The output data is output

from the SDA pin synchronously with the falling edge of the

serial clock pulse. Data is transferred in units of 8 bits.

In the first transfer, the command code is input. Then, address

input or data input/output is performed according to the

contents of the command code. Table 11 shows the software

command used in the PROM mode. The following explains

each software command.

Table 11 Software command

Number of transfer First command

Command

code input

Read

1516

Program

2516

Program verify

3516

Second

Read address L (input)

Program address L (input)

Program address L (input)

Third

Read address H (input)

Program address H (input)

Program address H (input)

Fourth

Read data L (output)

Program data L (input)

Program data L (input)

Number of transfer

Command

Read

Program

Program verify

Fifth

Read data H (output)

Program data H (input)

Program data H (input)

Sixth

Seventh

Verify data L (output)

Verify data H (output)

(3) Read

Input the command code 1516 in the first transfer. Proceed

and input the low-order 8 bits and the high-order 8 bits of the

address and pull the PGM pin to “L.” When this is done, the

contents of input address is read and stored into the internal

data latch.

When the PGM pin is released back to “H” and serial clock is

input to the SCLK pin, the low-order 8 bits and high-order 8

bits of read data which have been stored into the data latch,

are serially output from the SDA pin.

SCLK

SDA

PGM

tCH

tCH

tCH

1 010 10 00

Command code input (1516)

A0

A7

Read address input (L)

A8A9 A10

00000

Read address input (H)

tCR

tWR

D0

D7

Read data output (L)

tRC

D8

0000000

Read data output (H)

Read

Note: When outputting the read data, the SDA pin is switched for output at the first falling of the serial clock. The SDA pin is

placed in the high-impedance state during the th(C–E) period after the last rising edge of the serial clock (at the 16th bit).

Fig. 31 Timing at reading

Rev.1.33 Mar 18, 2004 page 62 of 67

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