MSC8122 View Datasheet(PDF) - Freescale Semiconductor
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MSC8122 Datasheet PDF : 48 Pages
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Electrical Characteristics
2.5.6.2 DSI Synchronous Mode
Table 19. DSI Inputs in Synchronous Mode
No.
Characteristic
Expression
120
121
122
123
124
125
126
127
Notes:
HCLKIN cycle time1,2
HTC
HCLKIN high pulse width
(0.5 ± 0.1) × HTC
HCLKIN low pulse width
(0.5 ± 0.1) × HTC
HA[11–29] inputs set-up time
—
HD[0–63] inputs set-up time
—
HCID[0–4] inputs set-up time
—
All other inputs set-up time
—
All inputs hold time
—
1. Values are based on a frequency range of 18–100 MHz.
2. Refer to Table 7 for HCLKIN frequency limits.
1.1 V Core
Min Max
10.0
55.6
4.0
33.3
4.0
33.3
1.2
—
0.6
—
1.3
—
1.2
—
1.5
—
1.2 V Core
Min Max
10.0
55.6
4.0
33.3
4.0
33.3
1.2
—
0.4
—
1.3
—
1.2
—
1.5
—
Units
ns
ns
ns
ns
ns
ns
ns
ns
Table 20. DSI Outputs in Synchronous Mode
No.
Characteristic
128 HCLKIN high to HD[0–63] output active
129 HCLKIN high to HD[0–63] output valid
130 HD[0–63] output hold time
131 HCLKIN high to HD[0–63] output high impedance
132 HCLKIN high to HTA output active
133 HCLKIN high to HTA output valid
134 HTA output hold time
135 HCLKIN high to HTA high impedance
1.1 V Core
Min Max
2.0
—
—
7.6
1.7
—
—
8.3
2.2
—
—
7.4
1.7
—
—
7.5
1.2 V Core
Min Max
2.0
—
—
6.3
1.7
—
—
7.6
2.0
—
—
5.9
1.7
—
—
6.3
Units
ns
ns
ns
ns
ns
ns
ns
ns
120
HCLKIN
HA[11–29] input signals
HD[0–63] input signals
HCID[0–4] input signals
All other input signals
123
124
125
126
HD[0–63] output signals
121
127
127
127
127
129
128
122
131
130
133
132
HTA output signal
135
134
Figure 17. DSI Synchronous Mode Signals Timing Diagram
MSC8122 Quad Digital Signal Processor Data Sheet, Rev. 15
Freescale Semiconductor
31
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