IS43TR16640A-125KBL View Datasheet(PDF) - Unspecified

Part Name

Description

Manufacturer

IS43TR16640A-125KBL

128MX8, 64MX16 1Gb DDR3 SDRAM

Unspecified 

IS43TR16640A, IS43TR81280A

4.2 Vref Tolerances

The dc-tolerance limits and ac-moist limits for the reference voltages VrefCA and VrefDQ are illustrated in the following

figure. It shows a valid reference voltage Vref(t) as a function of time. (Vref stands for VrefCA and VrefDQ likewise).

Vref(DC) is the linear average of Vref(t) over a very long period of time (e.g.,1 sec). This average has to meet the min/max

requirement in previous page. Furthermore Vref(t) may temporarily deviate from Vref(DC) by no more than ±1% VDD.

The voltage levels for setup and hold time measurements VIH(AC), VIH(DC), VIL(AC), and VIL(DC) are dependent on

Vref. “Vref” shall be understood as Vref(DC). The clarifies that dc-variations of Vref affect the absolute voltage a signal

has to reach to achieve a valid high or low level and therefore the time to which setup and hold is measured. System

timing and voltage budgets need to account for Vref(DC) deviations from the optimum position within the data-eye of the

input signals.

This also clarifies that the DRAM setup/hold specification and de-rating values need to include time and voltage

associated with Vref ac-noise. Timing and voltage effects due to ac-noise on Vref up to the specified limit (±1% of VDD)

are included in DRAM timing and their associated de-ratings.

Figure 4.2 Illustration of Vref(DC) tolerance and Vrefac-noise limits

Voltage

VDD

Vref(D

Vref ac-noise

Vref(t)

Vref(DC)

Vref(DC)

VSS

time

Integrated Silicon Solution, Inc. – www.issi.com –

30

Rev. 00A

04/16/2012

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