ST7FLITEU05B3 View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
ST7FLITEU05B3 Datasheet PDF : 115 Pages
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ST7LITEU05 ST7LITEU09
REGISTER DESCRIPTION (Cont’d)
AVD THRESHOLD SELECTION REGISTER
(AVDTHCR)
Read / Write
Reset Value: 0000 0011 (03h)
7
0
CK2 CK1 CK0 0
0
0 AVD1 AVD0
Bits 7:5 = CK[2:0] internal RC Prescaler Selection
These bits are set by software and cleared by
hardware after a reset. These bits select the pres-
caler of the internal RC oscillator. See Figure 14
on page 26 and the following table and note:
Table 6. Internal RC Prescaler Selection bits
CK2 CK1 CK0
001
010
011
100
others
fOSC
fRC/2
fRC/4
fRC/8
fRC/16
fRC
Note: If the internal RC is used with a supply oper-
ating range below 3.3V, a division ratio of at least 2
must be enabled in the RC prescaler.
Bits 4:2 = Reserved, must be kept cleared.
Bits 1:0 = AVD Threshold Selection bits. Refer to
Section 8.4 SYSTEM INTEGRITY MANAGE-
MENT (SI).
Table 7. Clock Register Map and Reset Values
Address
(Hex.)
0038h
0039h
003Ah
003Eh
003Fh
Register
Label
MCCSR
Reset Value
RCCR
Reset Value
SICSR
Reset Value
AVDTHCR
Reset Value
CKCNTCSR
Reset Value
7
-
0
CR9
1
-
0
CK2
0
-
0
6
-
0
CR8
1
CR1
0
CK1
0
-
0
5
-
0
CR7
1
CR0
0
CK0
0
-
0
CLOCK CONTROLLER CONTROL/STATUS
REGISTER (CKCNTCSR)
Read / Write
Reset Value: 0000 1001 (09h)
7
0
0
0
0
0
AWU_ RC_
FLAG FLAG
0
RC/
AWU
Bits 7:4 = Reserved, must be kept cleared.
Bit 3 = AWU_FLAG AWU Selection
This bit is set and cleared by hardware
0: No switch from AWU to RC requested
1: AWU clock activated and temporization com-
pleted
Bit 2 = RC_FLAG RC Selection
This bit is set and cleared by hardware
0: No switch from RC to AWU requested
1: RC clock activated and temporization complet-
ed
Bit 1 = Reserved, must be kept cleared.
Bit 0 = RC/AWU RC/AWU Selection
0: RC enabled
1: AWU enabled (default value)
4
3
2
1
0
-
0
CR6
1
-
0
-
0
-
0
-
-
MCO
0
0
0
CR5
1
CR4
1
CR3
1
-
LVDRF AVDF
0
x
0
-
-
AVD1
0
0
1
AWU_FLAG RC_FLAG
-
1
0
0
SMS
0
CR2
1
AVDIE
0
AVD2
1
RC/AWU
1
25/115
1
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