PIC16(L)F1516/7/8/9
3.3.6
SPECIAL FUNCTION REGISTERS
SUMMARY
The Special Function registers are listed in Table 3-8 .
TABLE 3-8: SPECIAL FUNCTION REGISTER SUMMARY
Addr
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Value on
POR, BOR
Value on all
other
Resets
Bank 0
00Ch PORTA
00Dh PORTB
00Eh PORTC
00Fh PORTD
010h PORTE
011h PIR1
012h PIR2
PORTA Data Latch when written: PORTA pins when read
PORTB Data Latch when written: PORTB pins when read
PORTC Data Latch when written: PORTC pins when read
PORTD Data Latch when written: PORTD pins when read
—
—
—
—
RE3
TMR1GIF ADIF
RCIF
TXIF
SSPIF
OSFIF
—
—
—
BCLIF
RE2(3)
CCP1IF
—
RE1(3)
TMR2IF
—
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
RE0(3)
TMR1IF
CCP2IF
xxxx xxxx uuuu uuuu
---- xxxx ---- uuuu
0000 0000 0000 0000
0--- 0--0 0--- 0--0
013h —
Unimplemented
—
—
014h —
Unimplemented
—
—
015h TMR0
016h TMR1L
017h TMR1H
018h T1CON
019h T1GCON
Holding Register for the 8-bit Timer0 Count
Holding Register for the Least Significant Byte of the 16-bit TMR1 Count
Holding Register for the Most Significant Byte of the 16-bit TMR1 Count
TMR1CS<1:0>
T1CKPS<1:0>
T1OSCEN T1SYNC
TMR1GE T1GPOL T1GTM T1GSPM T1GGO/ T1GVAL
DONE
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
—
TMR1ON 0000 00-0 uuuu uu-u
T1GSS<1:0>
0000 0x00 uuuu uxuu
01Ah TMR2
Timer 2 Module Register
0000 0000 0000 0000
01Bh PR2
01Ch T2CON
01Dh —
Timer 2 Period Register
—
Unimplemented
T2OUTPS<3:0>
TMR2ON
T2CKPS<1:0>
1111 1111 1111 1111
-000 0000 -000 0000
—
—
01Eh —
Unimplemented
—
—
01Fh —
Unimplemented
—
—
Bank 1
08Ch TRISA
PORTA Data Direction Register
1111 1111 1111 1111
08Dh TRISB
PORTB Data Direction Register
1111 1111 1111 1111
08Eh TRISC
PORTC Data Direction Register
1111 1111 1111 1111
08Fh TRISD(2)
PORTD Data Direction Register
1111 1111 1111 1111
090h TRISE
—
—
—
—
—(3)
TRISE2(2) TRISE1(2) TRISE0(2) ---- 1111 ---- 1111
091h PIE1
092h PIE2
093h —
TMR1GIE ADIE
OSFIE
—
Unimplemented
RCIE
—
TXIE
—
SSPIE
BCLIE
CCP1IE
—
TMR2IE
—
TMR1IE
CCP2IE
0000 0000 0000 0000
0--- 0--0 0--- 0--0
—
—
094h —
Unimplemented
—
—
095h OPTION_REG
WPUEN INTEDG TMR0CS TMR0SE
PSA
096h PCON
STKOVF STKUNF
—
RWDT RMCLR
RI
097h WDTCON
—
—
WDTPS<4:0>
098h —
Unimplemented
PS<2:0>
POR
1111 1111 1111 1111
BOR 00-1 11qq qq-q qquu
SWDTEN --01 0110 --01 0110
—
—
099h OSCCON
—
IRCF<3:0>
—
SCS<1:0>
-011 1-00 -011 1-00
09Ah OSCSTAT
09Bh ADRESL
09Ch ADRESH
09Dh ADCON0
09Eh ADCON1
09Fh —
SOSCR
—
OSTS HFIOFR
—
ADC Result Register Low
ADC Result Register High
—
CHS<4:0>
ADFM
ADCS<2:0>
—
Unimplemented
—
LFIOFR HFIOFS 0-q0 --00 q-qq --0q
xxxx xxxx uuuu uuuu
xxxx xxxx uuuu uuuu
GO/DONE ADON -000 0000 -000 0000
—
ADPREF<1:0> 0000 --00 0000 --00
—
—
Legend:
Note 1:
2:
3:
x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
PIC16F1516/7/8/9 only.
PIC16(L)F1517/9 only.
Unimplemented, read as ‘1’.
DS41452C-page 30
2010-2012 Microchip Technology Inc.