LC75893M
Blocks that are reset
3. Output pin states during the reset period
Output pin
S1/P1 to S4/P4
S5 to S14
State during reset
L *5
L
COM1 to COM3
L
KS1/S15, KS2/S16
L *5
KS3
X *6
KS4
H
DO
H *7
X: Don’t care
Note: *5. These output pins are forcibly set to the segment output function and held low.
*6. When power is first applied, these output pins are undefined until the S0 and S1 control data bits have been transferred.
*7. Since this output pin is an-open drain output, a pull-up resistor of between 1 and 10 kΩ is required. This pin remains high during the reset period
even if a key data read operation is performed.
No. 5971-16/23