Sample Application Circuit 1
1/2 bias (for use with normal panels)
LC75893M
Note: *8.Add a capacitor to the power supply line so that the power supply voltage VDD rise time when power is applied and the power supply voltage VDD fall
time when power drops are both at least 1 ms, as the LC75893M is reset by the VDET.
*9.The DO pin, being an open-drain output, requires a pull-up resistor. Select a resistance (between 1 to 10 kΩ) appropriate for the capacitance of the
external wiring so that signal waveforms are not degraded.
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