DM9302 View Datasheet(PDF) - Davicom Semiconductor, Inc.

Part Name

Description

Manufacturer

DM9302

10/100Mbps Ethernet Fiber/Twisted Pair Media Converter with Local bus

Davicom Semiconductor, Inc. 

DM9302

10/100Mbps Ethernet Fiber/Twisted Pair Media Converter with Local bus

7:0

MAB4

X,RW Multicast Address Byte 4 (1AH)

7:0

MAB3

X,RW Multicast Address Byte 3 (19H)

7:0

MAB2

X,RW Multicast Address Byte 2 (18H)

7:0

MAB1

X,RW Multicast Address Byte 1 (17H)

7:0

MAB0

X,RW Multicast Address Byte 0 (16H)

6.14 RX Packet Length Low Register ( 20H )

Bit

Name

Default

7:0

RXPLL

PH,RO RX Packet Length Low byte

Description

6.15 RX Packet Length High Register ( 21H )

Bit

Name

Default

7:0

RXPLH PH,RO RX Packet Length High byte

Description

6.16 RX Additional Status Register ( 26H )

Bit

Name

Default

Description

7:4 RESERVED 0,RO Reserved

1:0

uP received pointer status, only available when RX pointer restriction is enabled

(Reg27h.7=0).

RPTRS

PH,RO 00: Within buffer

01: End of buffer

1x: Exceed buffer

6.17 RX Additional Control Register ( 27H )

Bit

Name

Default

7

RPRD PHS0,RW RX pointer restriction disable

6:0 RESERVED 0,RO Reserved

6.18 Vendor ID Registers (28H~29H)

Bit

Name

Default

7:0

VIDH

PE,0AH,RO Vendor ID High Byte (29H)

7:0

VIDL

PE,46H.RO Vendor ID Low Byte (28H)

6.19 Chip Revision Register (2CH)

Bit

Name

Default

7:0

CHIPR

01H,RO CHIP Revision

Description

Description

Description

6.20 Transmit Check Sum Control Register (31H)

Bit

Name

Default

Description

7~3 RESERVED 0,RO Reserved

2

UDPCSE HP0,RW UDP Checksum Generation Enable

1

TCPCSE HP0,RW TCP Checksum Generation Enable

0

IPCSE

HP0,RW IP Checksum Generation Enable

20

Preliminary datasheet

DM9302-15-DS-P01

July 30, 2009

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