IDT79R4650-100DP(2000) View Datasheet(PDF) - Integrated Device Technology

Part Name

Description

Manufacturer

IDT79R4650-100DP
(Rev.:2000)

Low-Cost 64-bit RISController w/DSP Capability

Integrated Device Technology 

IDT79RC4650™

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(VCC=3.3V ± 5%; Commercial TCASE = 0°C to +85°C, Industrial TCASE = -40°C to +85°C)

Note: Timings are measured from 1.5V of the clock to 1.5V of the signal.

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Data Output1

Data Output Hold

tDM= Min

tDO = Max

tDOH2

mode14..13 = 10 (fastest)

mode14..13 = 01 (slowest)

mode14..13 = 10 (fastest)

Input Data Setup

tDS

Input Data Hold

tDH

trise = 5ns

tfall = 5ns

1. Capacitive load for all output timings is 50pF.

2. 50pf loading on external output signals, fastest settings

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1.0

9

2.0

12

1.0

—

4.5

—

1.5

—

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1.0

9

2.0

12

1.0

—

4.5

—

1.5

—

8QLWV

ns

ns

ns

ns

ns

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Data Output

tDM= Min

tDO = Max

mode14..13 = 10 (fastest)

mode14..13 = 01 (slowest)

Data Output Hold

tDOH*

mode14..13 = 10 (fastest)

Data Input

tDS

trise = 3ns

tDH

tfall = 3ns

50pf loading on external output signals, fastest settings

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<30+]

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5332

4330+]

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1.0 9

1.0 4.5 1.0

2.0 10 2.0 5.0 —

1.0 — 1.0 — 1.0

4.5 — 4.5 — 2.5

1.5 — 1.5 — 1.0

0D[

4.5

5.0

—

—

—

8QLWV

ns

ns

ns

ns

ns

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4830+] 4;30+] 5330+] 59:0+]

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Mode Data

tDS

—

Setup

Mode Data

tDH

—

Hold

3 — 3 — 3 — 3 — 3 — ns

0 — 0 — 0 — 0 — 0 — ns

Master Clock

Cycle

Master Clock

Cycle

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Load Derate CLD

—

—2

—2

—2

—2

—1

ns/25pF

18 of 25

March 28, 2000

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