DSP56011
Features
Peripheral and Support Circuits
• SAI includes:
PRELIMINARY – Tworeceiversandthreetransmitters
– Master or slave capability
– I2S, Sony, and Matshushita audio protocol implementations
– Two sets of SAI interrupt vectors
• SHI features:
– Single master capability
– SPI and I2C protocols
– 10-word receive FIFO
– Support for 8-, 16- and 24-bit words.
• Byte-wide Parallel Host Interface with DMA support capable of reconfiguration as fifteen
General Purpose Input/Output (GPIO) lines
• DAX features one serial transmitter capable of supporting S/PDIF, IEC958, CP-340, and
AES/EBU formats.
• Eight dedicated, independent, programmable GPIO lines
• On-chip peripheral registers memory mapped in data memory space
• OnCE port for unobtrusive, processor speed-independent debugging
• Software programmable PLL-based frequency synthesizer for the core clock
• Power saving Wait and Stop modes
• Fully static, HCMOS design from specified operating frequency down to dc
• 100-pin plastic Thin Quad Flat Pack (TQFP) surface-mount package
• 5 V power supply
Preliminary Information
MOTOROLA
DSP56011 Technical Data Sheet, Rev. 1
v