NT5SV16M8CT View Datasheet(PDF) - Nanya Technology

Part Name

Description

Manufacturer

NT5SV16M8CT

128Mb Synchronous DRAM

Nanya Technology 

NT5SV32M4CT

NT5SV16M8CT

NT5SV8M16CT

128Mb Synchronous DRAM

Burst Read Followed by the Precharge Command

(Burst Length = 4, CAS Latency = 3)

T0

T1

T2

T3

T4

T5

T6

T7

T8

CK

COMMAND READ Ax0

NOP

CAS latency = 3

tCK2, DQs

NOP

NOP

NOP

Precharge A

NOP

tRP

NOP

*‡

DOUT Ax0 DOUT Ax1 DOUT Ax2 D O U T A x3

NOP

* Bank A can be reactivated at completion of tRP.

‡ tR P is a function of clock cycle and speed sort.

Burst Write Followed by the Precharge Command

(Burst Length = 2, CAS Latency = 2)

T0

T1

T2

T3

T4

T5

T6

T7

T8

CK

COMMAND NOP

CAS latency = 2

tCK2, DQs

Activate

Bank Ax

NOP

WRITE Ax0

NOP

NOP

tDPL‡

Precharge A

NOP

tRP‡

NOP

*

DIN Ax 0

DIN Ax1

* Bank can be reactivated at completion of tRP.

‡ tDPL and t RP are functions of clock cycle and speed sort.

See the Clock Frequency and Latency table.

REV 1.0

May, 2001

22

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NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.

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