C8051F97X View Datasheet(PDF) - Silicon Laboratories

Part Name

Description

Manufacturer

C8051F97X

Low Power Capacitive Sensing MCU with up to 32 kB of Flash

Silicon Laboratories 

Table 1.5. Reset Electrical Characteristics

VDD = 1.8 to 3.6 V, –40 to +85 °C unless otherwise specified.

Parameter

Conditions

Min

Typ

Max

Unit

RST Output Low Voltage

RST input High Voltage

RST input Low Voltage

RST Input Pull-up Current

VDD Monitor Threshold (VRST)

VDD Monitor Threshold (VRST)

IOL = 1.4 mA

VDD = 2.0 to 3.6 V

VDD = 2.0 to 3.6 V

RST = 0 V, VDD = 3.6 V

Early Warning

Reset Trigger

(all modes ex. Sleep)

—

0.1

—

V

VDD – 0.6

—

—

V

—

—

0.6

V

—

22

—

µA

—

1.85

—

V

—

1.75

—

V

POR Monitor Threshold (VPOR)

POR Monitor Threshold (VPOR)

POR Monitor Threshold (VPOR)

Missing Clock Detector 

Timeout

Initial Power-On

Brownout Condition

Recovery from Brownout

Time from last system clock

rising edge to reset initiation

—

1.6

—

V

—

1.6

—

V

—

1.0

—

V

100

650 1000

µs

Minimum Sys Clock with Missing System clock frequency which

—

Clock Detector Enabled

triggers a missing clock

detector timeout

7

—

kHz

Reset Time Delay

Delay between release of any

—

reset source and code execution

at location 0x0000

—

30

µs

Minimum RST Low Time to Gen-

erate System Reset

VDD Monitor Turn-on Time

—

15

—

µs

—

300

—

ns

VDD Monitor Supply Current

—

20

—

µA

17

Rev 1.1

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