CS7620 View Datasheet(PDF) - Cirrus Logic

Part Name

Description

Manufacturer

CS7620

CCD Imager Analog Processor

Cirrus Logic 

CS7620

plus the bits representing the 2x gain and divide the

output by two (shift right by 1). The output of the

gain adjust block is then “0100011111.000.” Note

that the decimal point is virtual, having no exist-

ence in silicon. It is representing the fact that we

keep 3 extra bits of lower significance in the output.

In the same manner, if Vin = 0.75 V, a gain of 1X

would be chosen and the output of the gain adjust

block would be “1011001101000.” The transfer

function of the Vin/gain adjust out is shown in

Figure 11.

A block diagram of the gain adjust block is shown

in Figure 12.

Since the analog gain changes do not match the

digital shifts exactly, there is a potential to have

non-monotonic digital output. In order to remove

this problem, calibration is performed. During cal-

ibration, offset values are found that will be used to

counteract the errors caused by the analog gain

mismatch. Using these offset values, the final out-

put is a monotonic continuous 13-bit value.

3.3 13-to-10 Bit Compander

While a 13 bit output may be useful in some appli-

cations, others may require the standard 10 bit out-

put. To accommodate this and yet still retain the

advantages of the increased dynamic range, a 13-

to-10 (or 13-to-12) bit compander is included. By

DIG ADJUST OUT (13 BITS)

8192

4096

8X 4X

2X

1X

2048

1024

0

0.13

0.27

0.53

00 01

10

1.07

VIN (V)

11

ADC OUTPUT

Figure 11. Transfer function of Vin to Gain Adjust output Block (assuming full scale level of 1.07V)

VGA_ADC OUTPUT

ADC OUTPUT

10

2

GAIN ADJUST

13

SHIFT BY 0,1,2, OR 3

Figure 12. Gain Adjust output Block

TO DIGITAL GAIN

DS301PP2

13

Share Link: