IMX51 View Datasheet(PDF) - Freescale Semiconductor

Part Name

Description

Manufacturer

IMX51

i.MX51 Applications Processors for Consumer and Industrial Products

Freescale Semiconductor 

Features

Table 2. i.MX51 Digital and Analog Modules (continued)

Block

Mnemonic

Block Name Subsystem

Brief Description

UART-1

UART-2

UART-3

USB

VPU

WDOG-1

WDOG-2

(TZ)

XTALOSC

UART

Interface

Connectivity

Peripherals

USB 2.0

High-Speed

OTG and 3x

Hosts

Video

Processing

Unit

Connectivity

Peripherals

Multimedia

Peripherals

Watch Dog

Timer

Peripherals

Watch Dog Timer

(TrustZone) Peripherals

Crystal

Clocking

Oscillator I/F

Each of the UART modules supports the following serial data transmit/receive

protocols and configurations:

• 7 or 8 bit data words, 1 or 2 stop bits, programmable parity (even, odd, or

none)

• Programmable baud rates up to 4 MHz. This is a higher max baud rate relative

to the 1.875 MHz, which is stated by the TIA/EIA-232-F standard and

previous Freescale UART modules.

• 32-byte FIFO on Tx and 32 half-word FIFO on Rx supporting auto-baud

• IrDA 1.0 support (up to SIR speed of 115200 bps)

• Option to operate as 8-pins full UART, DCE, or DTE

USB-OTG contains one high-speed OTG module, which is internally connected

to the on-chip HS USB PHY. There are an additional three high-speed host

modules that require external USB PHYs.

A high-performing video processing unit (VPU), which covers many SD-level

video decoders and SD-level encoders as a multi-standard video codec engine

as well as several important video processing such as rotation and mirroring.

VPU Features:

• MPEG-4 decode: 720p, 30 fps, simple profile and advanced simple profile

• MPEG-4 encode: D1, 25/30 fps, simple profile

• H.263 decode: 720p, 30 fps, profile 3

• H.263 encode: D1, 25/30 fps, profile 3

• H.264 decode: 720p, 30 fps, baseline, main, and high profile

• H.264 encode: D1, 25/30 fps, baseline profile

• MPEG-2 decode: 720p, 30 fps, MP-ML

• MPEG-2 encode: D1, 25/30 fps, MP-ML (in software with partial acceleration

in hardware)

• VC-1 decode: 720p, 30 fps, simple, main, and advanced profile

• DivX decode: 720p, 30 fps versions 3, 4, and 5

• RV10 decode: 720p, 30 fps

• MJPEG decode: 32 Mpix/s

• MJPEG encode: 64 Mpix/s

The Watch Dog Timer supports two comparison points during each counting

period. Each of the comparison points is configurable to evoke an interrupt to the

ARM core, and a second point evokes an external event on the WDOG line.

The TrustZone Watchdog (TZ WDOG) timer module protects against TrustZone

starvation by providing a method of escaping normal mode and forcing a switch

to the TZ mode. TZ starvation is a situation where the normal OS prevents

switching to the TZ mode. This situation should be avoided, as it can

compromise the system’s security. Once the TZ WDOG module is activated, it

must be serviced by TZ software on a periodic basis. If servicing does not take

place, the timer times out. Upon a time-out, the TZ WDOG asserts a TZ mapped

interrupt that forces switching to the TZ mode. If it is still not served, the TZ

WDOG asserts a security violation signal to the CSU. The TZ WDOG module

cannot be programmed or deactivated by a normal mode SW.

The XTALOSC module allows connectivity to an external crystal.

i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 6

Freescale Semiconductor

11

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