SHARP
LHF08CH3
26
1
2.2 AC INPUT/OUTPUT TEST CONDITIONS
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AC test inputs are driven at 2.7V for a Logic “1†and O.OV for a Logic “0.†Input timing begins, and output timing ends, at 1.35V.
input rise and fall times (10% to 90%) <IO ns.
1
Figure 11. Transient Input/Output Reference Waveform for Vcc=2.7V-3.6V
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AC test inputs are driven at 3.OV for a Logic “1†and O.OV for a Logic “0.†Input timing begins, and output timing ends, at 1.W.
Input rise and fall times (10% to 90%) ~10 ns.
Figure 12. Transient Input/Output Reference Waveform for VCc=3.3Vi0.3V
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AC test inputs are driven at VOH (2.4 VTTL) for a Logic “1†and VOL (0.45 VTTL) for a Logic “0.†Input timing begins at V+
(2.0 V~L) and VIL (0.8 V~L). Output timing ends at VIH and VIL. Input rise and fall times (10% to 90%) ~10 ns.
Figure 13. Transient Input/Output Reference Waveform for Vcc=5V*0.5V
1.3v
l-
T IN914
Test Confi uration Ca acitance Loadin Value
1
DEVICE
UNDER
TEST
CL Includes Jig
Capacitance
0 OUT
Figure 14. Transient Equivalent Testing
Load Circuit
Rev. 1.2