M2V28S20TP View Datasheet(PDF) - Mitsumi

Part Name

Description

Manufacturer

M2V28S20TP

128M Synchronous DRAM

Mitsumi 

SDRAM (Rev. 1.0E)

Jun. '99

MITSUBISHI LSIs

M2V28S20TP-6,-7,-8

M2V28S30TP-6,-7,-7L,-8,-8L

M2V28S40TP-7,-7L,-8,-8L

128M Synchronous DRAM

(4-BANK x 8,388,608-WORD x 4-BIT)

(4-BANK x 4,194,304-WORD x 8-BIT)

(4-BANK x 2,097,152-WORD x 16-BIT)

Multi Bank Interleaving READ (BL=4, CL=3)

CLK

Command

A0-9

ACT

Xa

tRCD

READ ACT

Y Xb

READ PRE

Y

A10

Xa

0 Xb

0

0

A11

Xa

Xb

BA0,1

00

00 10

10 00

DQ

Qa0 Qa1 Qa2 Qa3 Qb0 Qb1 Qb2

/CAS latency

Burst Length

READ with Auto-Precharge (BL=4, CL=3)

CLK

Command

A0-9

ACT

Xa

tRCD

READ

Y

BL + tRP

BL

ACT

tRP

Xa

A10

Xa

1

Xa

A11

Xa

Xa

BA0,1

00

00

00

DQ

Qa0 Qa1 Qa2 Qa3

Internal precharge start

READ Auto-Precharge Timing (BL=4)

CLK

Command

ACT

CL=3 DQ

READ

BL

Qa0 Qa1 Qa2 Qa3

CL=2 DQ

Qa0 Qa1 Qa2 Qa3

Internal Precharge Start Timing

MITSUBISHI ELECTRIC

19

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