QT1100A-ISG View Datasheet(PDF) - Quantum Research Group
Part Name
Description
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QT1100A-ISG Datasheet PDF : 42 Pages
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Bit_7: 1 = Indicates if there are any errors anywhere in the
part, of any type.
Bits_4,5: Encode for the number of keys in detection:
01 = one key
10 = two keys
11 = 3 keys or more
Bits_0..3: Encode for the first detected key in range 0..9.
If there are 2 or more keys in detection, the host controller
should also interrogate the part via the 0xC1 command to
read out all key detections. 0xC0 should be the dominant
interrogation command in the host interface; further
commands like 0xC1, 0xC2, 0xC5 etc. can be issued if the
response to 0xC0 warrants it.
A CRC byte is appended to the response ; this CRC includes
the command 0xC0 itself as the first byte in the CRC
calculation.
See also the very similar 0xC9 command, page 21.
3.5.6 Report All Keys - 0xC1
Returns two bytes which indicate any and all keys in
detection, as a bitfield, one bit per key. The first byte
returned is the MSByte. Key 0 reports in LSByte bit 0. Key 9
is reported in MSByte bit 1. The valid range of reporting is
from 0..0x03FF (i.e. the bottom 10 bits).
A CRC byte is appended to the response ; this CRC includes
the command 0xC1 itself as the first byte in the CRC
calculation.
3.5.7 Device Status - 0xC2
This command returns a byte response which indicates the
general device status. The return bit flags of the byte are as
follows:
Bit #
7
6
5
4
3
2
1
0
Description
1 = Key(s) are detecting (volatile)
1 = Eeprom error (non-volatile)
1 = Reset occurred (non-volatile)
1 = Extreme signal on one or more keys
(non-volatile) *
1 = Sync error (non-volatile)
1 = CRC error in EEPROM (non-volatile) *
1 = CRC error in RAM (non-volatile) *
1 = Cal error(s) (non-volatile) *
*These error types are considered major errors and will
cause a forced output on a chosen key or keys if EK mode is
set (Section 4.7). In Standalone mode (only scanport active
and no EEPROM present), an extreme signal on a key
disables the key and is not considered a major error.
Bit_7 = 1: Keys Active. There are one or more keys in
detection. This bit self-clears when there are no keys in
detection.
Bit_6 = 1: EEPROM error. EEPROM is not attached, or
EEPROM first byte is not 0xD6, or, the CRC of the
EEPROM’s Setup block is not correct. If the EEPROM is
absent and DIEE is connected to Vdd, an error will be
reported in this bit. This bit can be reset only by a device
reset or by the serial command sequence ‘0xC2 0xC7’.
See note below.
Bit_5 = 1: Reset occurred. A reset event occurred. The bit
can only be reset by the sequence ‘0xC2 0xC7’. See
note below.
Bit_4 = 1: Extreme signals. There are one or more keys
with an out-of-bounds signal condition. This bit is the
logical-OR of all 10 error flags from 0x8k bit 1 (extreme
signal error). The bit can be reset only by a device reset
or by a successful key recalibration.
Bit_3 = 1: Sync error. There has been a sync error, i.e. a
sync pulse was not found for ~1s or more. If the sync
pulses are restored, this error bit is NOT automatically
cleared. The bit can be reset only by device reset or by
the sequence ‘0xC2 0xC7’. See note below.
Bit_2 = 1: CRC EEPROM error. There has been a CRC
error in EEPROM (if an EEPROM is installed). This is
computed approximately once per second. The bit can be
reset only by device reset or by the sequence ‘0xC2
0xC7’. See note below.
Bit_1 = 1: CRC RAM error. There has been a CRC error in
RAM. This is computed approximately once per second.
The bit can be reset only by device reset or by the
sequence ‘0xC2 0xC7’. See note below.
Bit_0 = 1: Cal error(s). There was at least one calibration
error during the last calibration event. This bit is the
logical-OR of all 10 bit_2 error flags readable via
command 0x8k (Cal error; see Section 3.5.4). Bit_0 is
cleared only when all the Cal errors are cleared, which
can happen only if the problem key(s) have been
recalibrated properly.
A CRC byte is appended to the response ; this CRC
includes the command 0xC2 itself as the first byte in the
CRC calculation.
Note: The 0xC7 used to clear flag bits can immediately
follow the 0xC2 command; it is not required to issue the
0xC2 command a second time before issuing the 0xC7.
3.5.8 EEPROM CRC - 0xC3
This command returns the 8-bit CRC calculated from the
EEPROM contents (if one is installed). The CRC is
calculated according to the algorithm shown in Section 6.
A CRC byte is appended to the response ; this CRC includes
the command 0xC3 itself as the first byte in the CRC
calculation.
If this CRC does not agree with the expected result, the
device should be reloaded with the Setups command (0x01).
If an EEPROM does not exist (and pin DIEE is tied to Vdd as
recommended) the returned value will be 0x00.
3.5.9 RAM CRC - 0xC4
This command returns the 8-bit CRC calculated from the
RAM (volatile) Setup block in the device. The CRC is
calculated according to the algorithm shown in Section 6.
A CRC byte is appended to the response ; this CRC includes
the command 0xC4 itself as the first byte in the CRC
calculation.
If this CRC does not agree with the expected result, the
device should be reloaded using Setups command 0x01 (if
there is no EEPROM) or, the device should be reset (if there
is an EEPROM). If the latter case, and a reset does not fix
the problem, the EEPROM should be reloaded using the
0x01 command.
3.5.10 Error Flags for Group - 0xC5
Error flag bits are set in the response to this command if the
corresponding key is in condition {signal<LBLL} or
{signal>4095}, i.e. there is a short or open circuit, or there is
a component failure. The error flag bits are non-volatile, that
LQ
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Copyright © 2003-2005 QRG Ltd
QT1100A-ISG R3.02/1105
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