Z89C00 View Datasheet(PDF) - Zilog

Part Name

Description

Manufacturer

Z89C00

16-BIT DIGITAL SIGNAL PROCESSOR

Zilog 

ZILOG

INSTRUCTION FORMAT

PRELIMINARY

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Z89C00

16-BIT DIGITAL SIGNAL PROCESSOR

Note:

Source/Destination fields can specify either register or

RAM addresses in RAM pointer indirect mode.

Figure 8. General Instruction Format

Source field

Destination field

RAM Bank selection

Opcode

A. Registers

Source/Destination

0000

0001

0010

0011

0100

0101

0110

0111

1000

1001

1010

1011

1100

1101

1110

1111

Register

BUS**

X

Y

A

SR

STACK

PC

P**

EXT0

EXT1

EXT2

EXT3

EXT4

EXT5

EXT6

EXT7

B. Register Pointers Field

Source/Destination

Meaning

00xx

01xx

10xx

11xx

NOP

+1

–1/LOOP

+1/LOOP

xx00

xx01

xx10

xx11

P0:0 or P0:1*

P1:0 or P1:1*

P2:0 or P2:1*

Short Form Direct

Mode

Notes:

* If RAM Bank bit is 0, then Pn:0 are selected.

If RAM Bank bit is 1, then Pn:1 are selected.

** Read only.

D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0

Short Immediate Data

Reg. Pointer

0 0 0 P0:0

0 0 1 P1:0

0 1 0 P2:0

0 1 1 NA

1 0 0 P0:1

1 0 1 P1:1

1 1 0 P2:1

1 1 1 NA

Opcode

00011

Figure 9. Short Immediate Data Load Format

DC 4083-00

11

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