RM7000-250T View Datasheet(PDF) - PMC-Sierra
Part Name
Description
Manufacturer
RM7000-250T Datasheet PDF : 54 Pages
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RM7000™ Microprocessor with On-Chip Secondary Cache Datasheet
Released
Table 20 Interrupt Interface Pins
Pin Name Type
Description
Int*(9:0)
Input
Interrupt
Ten general processor interrupts, bit-wise ORed with bits 9:0 of the
interrupt register.
NMI*
Input
Non-maskable interrupt
Non-maskable interrupt, ORed with bit 15 of the interrupt register (bit 6
in R5000 compatibility mode).
Table 21 JTAG Interface Pins
Pin Name Type
JTDI
Input
JTCK
Input
JTDO
Output
JTMS
Input
Description
JTAG data in
JTAG serial data in.
JTAG clock input
JTAG serial clock input.
JTAG data out
JTAG serial data out.
JTAG command
JTAG command signal, signals that the incoming serial data is
command data.
Table 22 Initialization Interface Pins
Pin Name Type
Description
BigEndian
Input
Big Endian / Little Endian Control
Allows the system to change the processor addressing mode without
rewriting the mode ROM.
VccOK
Input
Vcc is OK
When asserted, this signal indicates to the RM7000 that the 2.5V
power supply has been above 2.25V for more than 100 milliseconds
and will remain stable. The assertion of VccOK initiates the reading of
the boot-time mode control serial stream.
ColdReset*
Input
Cold Reset
This signal must be asserted for a power on reset or a cold reset.
ColdReset must be de-asserted synchronously with SysClock.
Reset*
Input
Reset
This signal must be asserted for any reset sequence. It may be
asserted synchronously or asynchronously for a cold reset, or
synchronously to initiate a warm reset. Reset must be de-asserted
synchronously with SysClock.
ModeClock
Output
Boot Mode Clock
Serial boot-mode data clock output at the system clock frequency
divided by two hundred and fifty six.
ModeIn
Input
Boot Mode Data In
Serial boot-mode data input.
Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use
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Document ID: PMC-2002175, Issue 1
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