S34ML01G200BFI000(2012) View Datasheet(PDF) - Spansion Inc.
Part Name
Description
Manufacturer
S34ML01G200BFI000 Datasheet PDF : 68 Pages
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Data Sheet (Advance Information)
1.6 Addressing
1.6.1 S34ML01G2
Table 1.3 Address Cycle Map — 1 Gb Device
Bus Cycle
I/O0
I/O1
I/O2
I/O3
I/O4
I/O5
I/O6
I/O7
1st
A0
A1
A2
A3
A4
A5
A6
A7
2nd
A8
A9
A10
A11
L (1)
L (1)
L (1)
L (1)
3rd
A12
A13
A14
A15
A16
A17
A18
A19
4th
A20
A21
A22
A23
A24
A25
A26
A27
Note:
1. L must be set to low.
For the address bits, the following rules apply:
A0 - A11: column address in the page
A12 - A17: page address in the block
A18 - A27: block address
1.6.2 S34ML02G2
Table 1.4 Address Cycle Map — 2 Gb Device
Bus Cycle
I/O0
1st
A0
2nd
A8
3rd
A12
4th
A20
5th
A28
Note:
1. L must be set to low.
I/O1
A1
A9
A13
A21
L (1)
I/O2
A2
A10
A14
A22
L (1)
I/O3
A3
A11
A15
A23
L (1)
I/O4
A4
L (1)
A16
A24
L (1)
I/O5
A5
L (1)
A17
A25
L (1)
I/O6
A6
L (1)
A18
A26
L (1)
I/O7
A7
L (1)
A19
A27
L (1)
For the address bits, the following rules apply:
A0 - A11: column address in the page
A12 - A17: page address in the block
A18: plane address (for multiplane operations) / block address (for normal operations)
A19 - A28: block address
14
Spansion® SLC NAND Flash Memory for Embedded
S34ML01G2_04G2_01 August 3, 2012
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