CXD2529Q View Datasheet(PDF) - Sony Semiconductor

Part Name

Description

Manufacturer

CXD2529Q

CD Digital Signal Processor

Sony Semiconductor 

Description of Functions

1. CPU Interface and Instructions

• CPU Interface

This interface uses DATA, CLOK and XLAT to set the modes.

The interface timing chart is shown below.

CLOK

750ns or more

CXD2529Q

DATA

XLAT

D1 D2 D3 D0 D1 D2 D3

Data

Address

750ns or more

Registers 4toE

Valid

300ns max

• Information on each address and the data is provided in Table 1-1.

• The internal registers are initialized by a reset when XRST is low; the initialization data is shown in Table 1-2.

Note) When XLAT is low, SQCK must be set high.

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