CXD2529Q
Command bit
VCOSEL1 KSL3
KSL2
Processing
0
0
0
Multiplier PLL VCO1 is set to normal speed, and the output is
1/1 frequency-divided.
0
0
1
Multiplier PLL VCO1 is set to normal speed, and the output is
1/2 frequency-divided.
0
1
0
Multiplier PLL VCO1 is set to normal speed, and the output is
1/4 frequency-divided.
0
1
1
Multiplier PLL VCO1 is set to normal speed, and the output is
1/8 frequency-divided.
1
0
0
Multiplier PLL VCO1 is set to high speed∗1, and the output is
1/1 frequency-divided.
1
0
1
Multiplier PLL VCO1 is set to high speed∗1, and the output is
1/2 frequency-divided.
1
1
0
Multiplier PLL VCO1 is set to high speed∗1, and the output is
1/4 frequency-divided.
1
1
1
Multiplier PLL VCO1 is set to high speed∗1, and the output is
1/8 frequency-divided.
∗1 Approximately twice the normal speed.
Command bit
VCOSEL2 KSL1
KSL0
Processing
0
0
0
Wide-band PLL VCO2 is set to normal speed, and the output is
1/1 frequency-divided.
0
0
1
Wide-band PLL VCO2 is set to normal speed, and the output is
1/2 frequency-divided.
0
1
0
Wide-band PLL VCO2 is set to normal speed, and the output is
1/4 frequency-divided.
0
1
1
Wide-band PLL VCO2 is set to normal speed, and the output is
1/8 frequency-divided.
1
0
0
Wide-band PLL VCO2 is set to high speed∗2, and the output is
1/1 frequency-divided.
1
0
1
Wide-band PLL VCO2 is set to high speed∗2, and the output is
1/2 frequency-divided.
1
1
0
Wide-band PLL VCO2 is set to high speed∗2, and the output is
1/4 frequency-divided.
1
1
1
Wide-band PLL VCO2 is set to high speed∗2, and the output is
1/8 frequency-divided.
∗2 Approximately twice the normal speed.
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