CXD2529Q View Datasheet(PDF) - Sony Semiconductor

Part Name

Description

Manufacturer

CXD2529Q

CD Digital Signal Processor

Sony Semiconductor 

Command bit

OPSL1 = 1

OPSL1 = 0

DCOF can be set.

DCOF cannot be set.

Processing

CXD2529Q

Command bit

MCSL = 1

MCSL = 0

Processing

DF/DAC block master clock selection. Crystal = 768Fs (33.8688MHz)

DF/DAC block master clock selection. Crystal = 384Fs (16.9344MHz)

Command bit

CKOSL1 CKOSL0

Processing

0

0

The CKOUT pin output is 1/1-frequency divided of the crystal input.

0

1

The CKOUT pin output is 1/2-frequency divided of the crystal input.

1

0

The CKOUT pin output is 1/4-frequency divided of the crystal input.

1

1

The CKOUT pin output is fixed to low.

Command bit

Processing

ZDPL = 1

LMUT and RMUT pins are set to high for mute.

ZDPL = 0

LMUT and RMUT pins are set to low for mute.

∗ See the description of “Mute Flag Output” for the conditions of the mute flag output.

Command bit

ZMUT = 1

ZMUT = 0

Zero detection mute is on.

Zero detection mute is off.

Processing

Command bit

Processing

DCOF = 1

DC offset is off.

DCOF = 0

DC offset is on.

∗ DCOF can be set when OPSL is 1.

∗ Set the DC offset to off when the zero detection mute is on.

– 20 –

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