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LPC4357FET256 View Datasheet(PDF) - NXP Semiconductors.

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Description
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LPC4357FET256 Datasheet PDF : 162 Pages
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NXP Semiconductors
Table 3. Pin description …continued
Pin name
LPC435x/3x/2x/1x
32-bit ARM Cortex-M4/M0 microcontroller
Description
P2_2
P2_3
P2_4
M15 F5
121 84 [2]
N; I/O SGPIO6 — General purpose digital input/output pin.
PU I/O U0_UCLK — Serial clock input/output for USART0 in
synchronous mode.
I/O EMC_A11 — External memory address line 11.
O USB0_IND1 — USB0 port indicator LED control output 1.
I/O GPIO5[2] — General purpose digital input/output pin.
I CTIN_6 — SCT input 6. Capture input 1 of timer 3.
I T3_CAP2 — Capture input 2 of timer 3.
O EMC_CS1 — LOW active Chip Select 1 signal.
J12 D8 127 87 [3] N; I/O SGPIO12 — General purpose digital input/output pin.
PU I/O I2C1_SDA — I2C1 data input/output (this pin does not use a
specialized I2C pad).
O U3_TXD — Transmitter output for USART3. See Table 4 for
ISP mode.
I CTIN_1 — SCT input 1. Capture input 1 of timer 0. Capture
input 1 of timer 2.
I/O GPIO5[3] — General purpose digital input/output pin.
- R — Function reserved.
O T3_MAT0 — Match output 0 of timer 3.
O USB0_PPWR — VBUS drive signal (towards external
charge pump or power management unit); indicates that
VBUS must be driven (active HIGH).
Add a pull-down resistor to disable the power switch at reset.
This signal has opposite polarity compared to the
USB_PPWR used on other NXP LPC parts.
K11 D9 128 88 [3] N; I/O SGPIO13 — General purpose digital input/output pin.
PU I/O I2C1_SCL — I2C1 clock input/output (this pin does not use a
specialized I2C pad).
I U3_RXD — Receiver input for USART3. See Table 4 for ISP
mode.
I CTIN_0 — SCT input 0. Capture input 0 of timer 0, 1, 2, 3.
I/O GPIO5[4] — General purpose digital input/output pin.
- R — Function reserved.
O T3_MAT1 — Match output 1 of timer 3.
I USB0_PWR_FAULT — Port power fault signal indicating
overcurrent condition; this signal monitors over-current on
the USB bus (external circuitry required to detect
over-current condition).
LPC435X_3X_2X_1X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5.2 — 26 November 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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