LPC4357FET256 View Datasheet(PDF) - NXP Semiconductors.

Part Name

Description

Manufacturer

LPC4357FET256

32-bit ARM Cortex-M4/M0 MCU; up to 1 MB flash and 136 kB SRAM; Ethernet, two High-speed USB, LCD, EMC

NXP Semiconductors. 

NXP Semiconductors

Table 3. Pin description …continued

Pin name

LPC435x/3x/2x/1x

32-bit ARM Cortex-M4/M0 microcontroller

Description

P2_5

P2_6

P2_7

P2_8

K14 D10 131 91 [3] N; I/O SGPIO14 — General purpose digital input/output pin.

PU I CTIN_2 — SCT input 2. Capture input 2 of timer 0.

I USB1_VBUS — Monitors the presence of USB1 bus power.

Note: This signal must be HIGH for USB reset to occur.

I ADCTRIG1 — ADC trigger input 1.

I/O GPIO5[5] — General purpose digital input/output pin.

- R — Function reserved.

O T3_MAT2 — Match output 2 of timer 3.

O USB0_IND0 — USB0 port indicator LED control output 0.

K16 G9 137 95 [2] N; I/O SGPIO7 — General purpose digital input/output pin.

PU I/O U0_DIR — RS-485/EIA-485 output enable/direction control

for USART0.

I/O EMC_A10 — External memory address line 10.

O USB0_IND0 — USB0 port indicator LED control

output 0.

I/O GPIO5[6] — General purpose digital input/output pin.

I CTIN_7 — SCT input 7.

I T3_CAP3 — Capture input 3 of timer 3.

O EMC_BLS1 — LOW active Byte Lane select signal 1.

H14 C10 138 96 [2] N; I/O GPIO0[7] — General purpose digital input/output pin. If this

PU

pin is pulled LOW at reset, the part enters ISP mode or boots

from an external source (see Table 4 and Table 5).

O CTOUT_1 — SCT output 1. Match output 3 of timer 3.

I/O U3_UCLK — Serial clock input/output for USART3 in

synchronous mode.

I/O EMC_A9 — External memory address line 9.

- R — Function reserved.

- R — Function reserved.

O T3_MAT3 — Match output 3 of timer 3.

- R — Function reserved.

J16 C6 140 98 [2] N; I/O SGPIO15 — General purpose digital input/output pin. Boot

PU

pin (see Table 5).

O CTOUT_0 — SCT output 0. Match output 0 of timer 0.

I/O U3_DIR — RS-485/EIA-485 output enable/direction control

for USART3.

I/O EMC_A8 — External memory address line 8.

I/O GPIO5[7] — General purpose digital input/output pin.

- R — Function reserved.

- R — Function reserved.

- R — Function reserved.

LPC435X_3X_2X_1X

Product data sheet

All information provided in this document is subject to legal disclaimers.

Rev. 5.2 — 26 November 2015

© NXP Semiconductors N.V. 2015. All rights reserved.

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