56F8357 View Datasheet(PDF) - Motorola => Freescale
Part Name
Description
Manufacturer
56F8357 Datasheet PDF : 160 Pages
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Freescale Semiconductor, Inc.
56F8357 Signal Pins
Table 2-2 56F8357 Signal and Package Information for the 160-Pin LQFP
Signal Name Pin No. Type
State
During
Reset
Signal Description
A8
(GPIOA0)
A9
(GPIOA1)
A10
(GPIOA2)
A11
(GPIOA3)
A12
(GPIOA4)
A13
(GPIOA5)
A14
(GPIOA6)
A15
(GPIOA7)
GPIOB0
(A16)
GPIOB1
(A17)
GPIOB2
(A18)
GPIOB3
(A19)
19
Output Tri-stated Address Bus— A8 - A15 specify eight of the address lines
for external program or data memory accesses.
Depending upon the state of the DRV bit in the EMI bus
control register (BCR), A8–A15 and EMI control signals are
tri-stated when the external bus is inactive.
Schmitt
Input/
20
Output
21
22
Input
Port A GPIO — These eight GPIO pins can be individually
programmed as input or output pins.
After reset, the default state is Address Bus.
To deactivate the internal pull-up resistor, clear the
appropriate GPIO bit in the GPIOA_PUR register.
Example: GPIOA0, clear bit 0 in the GPIOA_PUR register.
23
24
25
26
33
Schmitt
Input/
Output
Input
Port B GPIO — These four GPIO pins can be
programmed as input or output pins.
Output Tri-stated Address Bus — A16 - A19 specify one of the address
lines for external program or data memory accesses.
34
Depending upon the state of the DRV bit in the EMI bus
control register (BCR), A0–A23 and EMI control signals are
tri-stated when the external bus is inactive.
35
After reset, the startup state of GPIOB0 - 3 (GPIO or
address) is determined as a function of EXTBOOT,
36
EMI_MODE and the Flash security setting. See Table 4-4
for further information on when this pin is configured as an
address pin at reset. In all cases, this state may be
changed by writing to GPIOB_PER.
To deactivate the internal pull-up resistor, clear the
appropriate GPIO bit in the GPIOB_PUR register.
56F8357 Technical Data
17
Preliminary
For More Information On This Product,
Go to: www.freescale.com
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