LS7166 View Datasheet(PDF) - LSI Corporation
Part Name
Description
Manufacturer
LS7166 Datasheet PDF : 15 Pages
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I/O DESCRIPTION:
(See REGISTER DESCRIPTION for I/O Prgramming.)
Data-Bus (D0 - D7) (Pin 8 - Pin 15). The 8-line data bus is a
three-state I/O bus for interfacing with the system bus.
CS (Chip Select Input) (Pin 2). A logical "0" at this input enables
the chip for Read and Write.
RD (Read Input) (Pin 19). A logical "0" at this input enables the
OSR and the OL to be read on the data bus.
WR (Write Input) (Pin 1). A logical "0" at this input enables the
data bus to be written into the control and data registers.
C/D (Control/Data Input) (Pin 18). A logical "1" at this input en-
ables a control word to be written into one of the four control reg-
isters or the OSR to be read on the I/O bus. A logical "0" enables
a data word to be written into the PR, or the OL to be read on the
I/O bus.
A (Pin 6). Input A is a programmable count input capable of
functioning in three different modes, such as up count input, down
count input and quadrature input. In non-quadrature mode, the
counter advances on the rising edge of Input A.
B (Pin 7). Input B is also a programmable count input that can be
programmed to function either as down count input, or count
direction control gate for input A, or quadrature input. In non- quad-
rature mode, and when programmed as the Down Count input, the
counter advances on the rising edge of Input B. When B is pro-
grammed as the count direction control gate, B = 0 enables A as
the Up Count input and B = 1 enables A as the Down Count input.
When programmed as the direction input, B can switch state only
when A is high.
ABGT/RCTR (Pin 4). This input can be programmed to function
as either inputs A and B enable gate or as external counter reset
input. A logical "0" is the active level on this input. In non-
quadrature mode, if Pin 4 is programmed as A and B enable gate
input, it may switch state only when A is high (if A is clock and B
is direction) or when both A and B are high (if A and B are
clocks). In quadrature mode, if Pin 4 is programmed as A and B
enable gate, it may switch state only when either A or B switches.
LCTR/LLTC (Pin 3 ) This input can be programmed to function
as the external load command input for either the CNTR or the
OL. When programmed as counter load input, the counter is
loaded with the data contained in the PR. When programmed as
the OL load input, the OL is loaded with data contained in the
CNTR. A logical "0" is the active level on this input.
CY (Pin 16) This output can be programmed to serve as one of
the following:
A. CY. Complemented Carry out (active "0").
B. CY. True Carry out (active "1").
C. CYT. Carry Toggle flip-flop out.
D. COMP. Comparator out (active "0")
BW (Pin 17) This output can be programmed to serve as one of
the following:
A. BW. Complemented Borrow out (active "0").
B. BW. True Borrow out (active "1").
C. BWT. Borrow Toggle flip-flop out.
D. COMPT. Comparator Toggle output.
VDD (Pin 5) Supply voltage positive terminal.
VSS (Pin 20) Supply voltage negative terminal.
Absolute Maximum Ratings:
Parameter
Voltage at any input
Symbol
VIN
Operating Temperature
TA
Storage Temperature
Supply Voltage
TSTG
VDD - VSS
Values
VSS - 0.3 to VDD + 0.3
-40 to +125
-65 to +150
+7.0
Unit
V
oC
oC
V
DC Electrical Characteristics. (All voltages referenced to VSS.
TA = 0˚ to 85˚C, VDD = 3V to 5.5V, fc = 0, unless otherwise specified)
Parameter
Supply Voltage
Supply Current
Input Low Voltage
Input High Voltage
Output Low Voltage
Output High Voltage
Input Current
Symbol
VDD
IDD
VIL
VIH
VOL
VOH
-
Min. Value
3.0
-
0
2.0
-
2.5
-
Max.Value
5.5
350
0.8
VDD
0.4
-
15
Output Source Current
ISRC
200
-
Output Sink Current
ISINK
4
-
Data Bus Off-State
Leakage Current
-
-
15
Unit
V
µA
V
V
V
V
nA
µA
mA
nA
Remarks
-
Outputs open
-
-
4mA Sink, VDD = 5V
200µA Source, VDD = 5V
Leakage
Current
VOH = 2.5V, VDD = 5V
VOL = 0.4V, VDD = 5V
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7166-082906-5
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