DS17285(1998) View Datasheet(PDF) - Dallas Semiconductor -> Maxim Integrated
Part Name
Description
Manufacturer
DS17285 Datasheet PDF : 32 Pages
| |||
DS17285/DS17287
SILICON SERIAL NUMBER
A unique 64–bit lasered serial number is located in bank
1, registers 40h – 47h. This serial number is divided into
three parts. The first byte in register 40h contains a
model number to identify the device type and revision of
the DS17285/DS17287. Registers 41h – 46h contain a
unique binary number. Register 47h contains a CRC
byte used to validate the data in registers 40h – 46h. All
eight bytes of the serial number are read–only registers.
The DS17285/DS17287 is manufactured such that no
two devices will contain an identical number in locations
41h – 47h.
CENTURY COUNTER
A register has been added in bank 1, location 48H, to
keep track of centuries. The value is read in either
binary or BCD according to the setting of the DM bit.
RTC WRITE COUNTER
An eight bit counter located in extended register bank 1,
5Eh, will count the number of times the RTC is written to.
This counter will be incremented on the rising edge of
the WR signal every time that the CS signal qualifies it.
This counter is a read–only register and will roll–over
after 256 RTC write pulses. This counter can be used to
determine if and how many RTC writes have occurred
since the last time this register was read.
2K X 8 EXTENDED RAM
The DS17285/DS17287 provides 2K x 8 of on–chip
SRAM which is controlled as nonvolatile storage sus-
tained from a lithium battery. On power–up, the RAM is
taken out of write protect status by the internal power
OK signal (POK) generated from the write protect cir-
cuitry.
The on–chip 2K x 8 nonvolatile SRAM is accessed via
the eight multiplexed address/data lines AD7 to AD0.
Access to the SRAM is controlled by three on–chip latch
registers. Two registers are used to hold the SRAM
address, and the other register is used to hold read/write
data. The SRAM address space is from 00h to 07FFh.
Access to the extended 2K x 8 RAM is controlled via
three of the Dallas registers shown in Figure 4. The Dal-
las registers in bank 1 must first be selected by setting
the DV0 bit in register A to a logic 1. The 11–bit address
of the RAM location to be accessed must be loaded into
the extended RAM address registers located at 50h and
51h. The least significant address byte should be writ-
ten to location 50h, and the most significant 3–bits
(right–justified) should be loaded in location 51h. Data
in the addressed location may be read by performing a
read operation from location 53h, or written to by per-
forming a write operation to location 53h. Data in any
addressed location may be read or written repeatedly
without changing the address in location 50h and 51h.
To read or write consecutive extended RAM locations, a
burst mode feature can be enabled to increment the
extended RAM address. To enable the burst mode fea-
ture, set the BME bit in the extended control register
4Ah, to a logic 1. With burst mode enabled, write the
extended RAM starting address location to registers
50h and 51h. Then read or write the extended RAM data
from/to register 53h. The extended RAM address loca-
tions are automatically incremented on the rising edge
of RD or WR only when register 53h is being accessed.
Refer to the Burst Mode Timing Waveform.
AUXILIARY BATTERY
The VBAUX input is provided to supply power from an
auxiliary battery for the DS17285/DS17287 kickstart,
wake up, and SQW output features in the absence of
VCC. This power source must be available in order to
use these auxiliary features when no VCC is applied to
the device.
The Auxiliary Battery Enable (ABE; bank 1, register
04BH) bit in extended control register 4B is used to turn
on and off the auxiliary battery for the above functions in
the absence of VCC. When set to a 1, VBAUX battery
power is enabled, and when cleared to 0, VBAUX battery
power is disabled to these functions.
In the DS17285/DS17287, this auxiliary battery may be
used as the primary backup power source for maintain-
ing the clock/calendar, user RAM, and extended exter-
nal RAM functions. This occurs if the VBAT pin is at a
lower voltage than VBAUX. If the DS17285 is to be
backed-up using a single battery with the auxiliary fea-
tures enabled, then VBAUX should be used and VBAT
should be grounded. If VBAUX is not to be used, it should
be grounded and ABE should be cleared to 0.
WAKE UP/KICKSTART
The DS17285/DS17287 incorporates a wake up feature
which can power the system on at a pre–determined
date through activation of the PWR output pin. In addi-
030598 14/32
Share Link: 