PC8240 View Datasheet(PDF) - Atmel Corporation
Part Name
Description
Manufacturer
PC8240 Datasheet PDF : 42 Pages
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PC8240
3. See Table 7 on page 17 for the typical drive capability of a specific signal pin based upon the type of output driver associ-
ated with that pin as listed in.
4. These specifications are for the default driver strengths indicated in Table.
5. Leakage current is measured on input pins and on output pins in the high impedance state. The leakage current is mea-
sured for nominal OVdd/LVdd and Vdd or both Ovdd/LVdd and Vdd must vary in the same direction.
Table 7 provides information on the characteristics of the output drivers referenced in.
The values are from the PC8240 IBIS model (v1.0) and are not tested, for additional
detailed information see the complete IBIS model listing at
http://www.mot.com/SPS/PowerPC/ teksupport/tools/IBIS/kahlua_1.ibs.txt
Table 7. Drive Capability of PC8240 Output Pins
Driver Type
DRV_STD
DRV_PCI
Programmable Output
Impedance (Ohms)
20
40 (default)
25
50 (default)
Supply
Voltage (V)
OVdd = 3.3
OVdd = 3.3
LVdd = 3.3
LVdd = 5.0
LVdd = 3.3
IOH
TBD
TBD
11.0
5.6
5.6
IOL
TBD
TBD
20.6
10.3
10.3
Unit
mA
mA
mA
mA
mA
Notes
(2)(5)
(2)(5)
(1)(4)
(1)(4)
(1)(4)
DRV_MEM_ADDR
DRV_PCI_CLK
DRV_MEM_DATA
8 (default)
13.3
20
40
20 (default)
LVdd = 5.0
5.6
10.3
mA
(1)(4)
GVdd = 2.5
TBD
TBD
mA
(3)(6)
GVdd = 3.3
89.0
73.3
mA
(2)(5)
GVdd = 2.5
TBD
TBD
mA
(3)(6)
GVdd = 3.3
55.9
46.4
mA
(2)(5)
GVdd = 2.5
TBD
TBD
mA
(3)(6)
GVdd = 3.3
36.7
30.0
mA
(2)(5)
GVdd = 2.5
TBD
TBD
mA
(3)(6)
GVdd = 3.3
TBD
TBD
mA
(2)(5)
GVdd = 2.5
TBD
TBD
mA
(3)(6)
GVdd = 3.3
36.7
30.0
mA
(2)(5)
40
GVdd = 2.5
TBD
TBD
mA
(3)(6)
GVdd = 3.3
18.7
15.0
mA
(2)(5)
Notes:
1. For DRV_PCI, IOH read from the listing in the pull-up mode, I(Min) column, at the 0.33V label by interpolating between the
0.3V and 0.4V table entries’ current values which correspond to the PCI VOH = 2.97 = 0.9*LVdd (LVdd = 3.3V) where Table
Entry Voltage = LVdd - PCI VOH.
2. For all others with OVdd or GVdd = 3.3V, IOH read from the listing in the pull-up mode, I(Min) column, at the 0.9V table entry
which corresponds to the VOH = 2.4V where Table Entry Voltage = O/GVdd - PCI VOH.
3. For GVdd = 2.5V, IOH read from the listing in the pull-up mode, I(Min) column, at the TBDV table entry which corresponds to
the VOH = TBD V where Table Entry Voltage = GVdd - VOH.
4. For DRV_PCI, IOL read from the listing in the pull-down mode, I(Max) column, at 0.33V = PCI VOL = 0.1*LVdd (LVdd = 3.3V)
by interpolating between the 0.3V and 0.4V table entries.
5. For all others with OVdd or GVdd = 3.3V, IOL read from the listing in the pull-down mode, I(Max) column, at the 0.4V table
entry.
6. For GVdd = 2.5V, IOL read from the listing in the pull-down mode, I(Max) column, at the TBDV table entry.
17
2149A–HIREL–05/02
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