CDP1805AC View Datasheet(PDF) - Intersil

Part Name

Description

Manufacturer

CDP1805AC

CMOS 8-Bit Microprocessor with On-Chip RAM and Counter/Timer

Intersil 

CDP1805AC, CDP1806AC

TABLE 1. INSTRUCTION SUMMARY (SEE NOTES) (Continued)

INSTRUCTION

NO. OF

MACHINE

CYCLES

MNEMONIC

OP CODE

OPERATION

AND IMMEDIATE

2

ANI

FA

M(R(P)) AND D → D; R(P) + 1 → R(P)

SHIFT RIGHT

2

SHR

F6

Shift D Right, LSB(D) → DF, 0 → MSB(D)

SHIFT RIGHT WITH CARRY

2

SHRC

76

Shift D Right, LSB(D) → DF, DF → MSB(D)

(Note 11)

RING SHIFT RIGHT

2

RSHR

76

SHIFT D RIGHT, LSB(D) → DF, DF → MSB(D)

(Note 11)

SHIFT LEFT

2

SHL

FE

SHIFT D LEFT, MSB(D) → DF, 0 → LSB(D)

SHIFT LEFT WITH CARRY

2

SHLC

7E

SHIFT D LEFT, MSB(D) → DF, DF → LSB(D)

(Note 11)

RING SHIFT LEFT

2

RSHL

7E

SHIFT D LEFT, MSB(D) → DF, DF → LSB(D)

(Note 11)

ARITHMETIC OPERATIONS (Note 3)

ADD

2

ADD

F4

M(R(X)) + D → DF, D

DECIMAL ADD

4

DADD

68F4 M(R(X)) + D → DF, D DECIMAL ADJUST → DF, D

ADD IMMEDIATE

2

ADI

FC

M(R(P)) + D → DF, D; R(P) + 1 → R(P)

DECIMAL ADD IMMEDIATE

4

DADI

68FC M(R(P)) + D → DF, D; R(P) + 1 → R(P)

DECIMAL ADJUST → DF, D

ADD WITH CARRY

2

ADC

74

M(R(X)) + D + DF → DF, D

DECIMAL ADD WITH CARRY

4

DADC

6874 M(R(X)) + D + DF → DF, D

DECIMAL ADJUST → DF, D

ADD WITH CARRY, IMMEDIATE

2

ADCI

7C

M(R(P)) + D + DF → DF, D;

R(P) + 1 → R(P)

DECIMAL ADD WITH CARRY,

IMMEDIATE

4

DACI

687C M(R(P)) + D + DF → DF, D;

R(P) + 1 → R(P),

DECIMAL ADJUST → DF, D

SUBTRACT D

2

SD

F5

M(R(X)) - D → DF, D

SUBTRACT D IMMEDIATE

2

SDI

FD

M(R(P)) - D → DF, D;

R(P) + 1 → R(P)

SUBTRACT D WITH BORROW

2

SDB

75

M(R(X)) - D - (NOT DF) → DF, D

SUBTRACT D WITH BORROW,

2

IMMEDIATE

SDBI

7D

M(R(P)) - D - (NOT DF) → DF, D;

R(P) + 1 → R(P)

SUBTRACT MEMORY

2

SM

F7

D - M(R(X)) → DF, D

DECIMAL SUBTRACT MEMORY

4

DSM

68F7 D - M(R(X)) → DF, D; DECIMAL ADJUST → DF, D

SUBTRACT MEMORY IMMEDIATE

2

SMI

FF

D - M(R(P)) → DF, D; R(P) + 1 → R(P)

DECIMAL SUBTRACT MEMORY,

4

IMMEDIATE

DSMI

68FF

D - M(R(P)) → DF, D;

R(P) + 1 → R(P),

DECIMAL ADJUST → DF, D

SUBTRACT MEMORY WITH

BORROW

2

SMB

77

D - M(R(X)) - (NOT DF) → DF, D

DECIMAL SUBTRACT MEMORY

4

WITH BORROW

DSMB

6877

D - M(R(X)) - (NOT DF) → DF, D;

DECIMAL ADJUST → DF, D

SUBTRACT MEMORY WITH

BORROW, IMMEDIATE

2

SMBI

7F

D - M(R(P)) - (NOT DF) → DF, D;

R(P) + 1 → R(P)

18

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