CDP1805AC View Datasheet(PDF) - Intersil
Part Name
Description
Manufacturer
CDP1805AC Datasheet PDF : 30 Pages
| |||
CDP1805AC, CDP1806AC
TABLE 2. CONDITIONS ON DATA BUS AND MEMORY ADDRESS LINES DURING ALL MACHINE STATES (Continued)
STATE
I
S1
6
S1
6
S1
7
S1
7
S1
7
S1
7
S1
7
S1
7
S1
7
S1
7
S1
7
S1
7
S1
7
S1
7
S1
7
S1
7
S1
7
S1
7
S1
8
S1
9
S1
A
S1
B
S1#1
C
#2
C
S1#1
C
#2
C
S1#1
C
#2
C
N
MNEMONIC
OPERATION
DATA
BUS
MEMORY
N
ADDRESS MRD MWR LINES
E
INP 6
BUS → MRX, D
DATA
RX
FROM
I/O
DEVICE
1
0
6
F
INP 7
BUS → MRX, D
DATA
RX
FROM
I/O
DEVICE
1
0
7
0
RET
MRX → X, P; RX + 1 → RX
MRX
RX
0
1
0
1 → MIE
1
DIS
MRX → X, P; RX + 1 → RX
MRX
RX
0
1
0
0 → MIE
2
LDXA
MRX → D; RX + 1 → RX
MRX
RX
0
1
0
3
STXD
D → MRX; RX - 1 → RX
D
RX
1
0
0
4
ADC
MRX + D + DF → DF, D
MRX
RX
0
1
0
5
SDB
MRX - D - DFN → DF, D
MRX
RX
0
1
0
6
SHRC
LSB(D) → DF; DF → MSB(D)
HIGH Z
RX
1
1
0
7
SMB
D - MRX - DFN → DF, D
MRX
RX
0
1
0
8
SAV
T → MRX
T
RX
1
0
0
9
MARK
X, P → T, MR2; P → X
R2 - 1 → R2
T
R2
1
0
0
A
REQ
0→Q
HIGH Z
RP
1
1
0
B
SEQ
1→Q
HIGH Z
RP
1
1
0
C
ADCI
MRP + D + DF → DF, D; RP + 1 MRP
RP
0
1
0
D
SDBI
MRP - D - DFN → DF, D; RP + 1 MRP
RP
0
1
0
E
SHLC
MSB(D) → DF; DF → LSB D
HIGH Z
RP
1
1
0
F
SMBI
D - MRP - DFN → DF, D; RP + 1 MRP
RP
0
1
0
0-F
GLO
RN.0 → D
RN.0
RN
1
1
0
0-F
GHI
RN.1 → D
RN.1
RN
1
1
0
0-F
PLO
D → RN.0
D
RN
1
1
0
0-F
PHI
D → RN.1
D
RN
1
1
0
0-3,
LONG
TAKEN: MRP → B; RP + 1 → RP MRP
8-B
BRANCH
RP
0
1
0
0-3,
LONG
TAKEN: B → RP.1; MRP →
M(RP + 1) RP + 1
0
1
0
8-B
BRANCH RP.0
0-3,
LONG
NOT TAKEN RP + 1 → RP
8-B
BRANCH
MRP
RP
0
1
0
0-3,
LONG
NOT TAKEN RP + 1 → RP
8-B
BRANCH
M(RP + 1) RP + 1
0
1
0
5
LONG
TAKEN: RP + 1 → RP
SKIP
MRP
RP
0
1
0
6
LONG
TAKEN: RP + 1 → RP
SKIP
M(RP + 1) RP + 1
0
1
0
25
Share Link: 