CDP1805AC View Datasheet(PDF) - Intersil
Part Name
Description
Manufacturer
CDP1805AC Datasheet PDF : 30 Pages
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CDP1805AC, CDP1806AC
TABLE 2. CONDITIONS ON DATA BUS AND MEMORY ADDRESS LINES DURING ALL MACHINE STATES (Continued)
STATE
I
S1
0
S1
0
S1
0
S1
0
S1
0
S1
0
S1
0
S1
0
S1
0
S1
0
S1
0
S1
0
S1#1
2
#2
2
#3
2
S1
3
S1
3
S1#1
6
#2
6
#3
6
S1#1
7
#2
7
S1#1
7
#2
7
#3
7
#4
7
S1#1
7
#2
7
S1#1
7
#2
7
S1#1
7
N
MNEMONIC
OPERATION
DATA
BUS
MEMORY
N
ADDRESS MRD MWR LINES
2
SPM2
CNTR - 1 ON EF2 AND TPA
HIGH Z
R2
1
1
0
3
SCM2
CNTR - 1 ON EF2 0 TO 1
HIGH Z
R3
1
1
0
4
SPM1
CNTR - 1 ON EF1 AND TPA
HIGH Z
R4
1
1
0
5
SCM1
CNTR - 1 ON EF1 0 TO 1
HIGH Z
R5
1
1
0
6
LDC
CNTR STOPPED: D → CH,
D
R6
1
1
0
CNTR; 0 → CI
CNTR RUNNING: D → CH
7
STM
CNTR - 1 ON TPA ÷ 32
HIGH Z
R7
1
1
0
8
GEC
CNTR → D
CNTR
R8
1
1
0
9
ETQ
IF CNTR THRU 0: Q → Q
HIGH Z
R9
1
1
0
A
XIE
1 → XIE
HIGH Z
RA
1
1
0
B
XID
0 → XIE
HIGH Z
RB
1
1
0
C
CIE
1 → CIE
HIGH Z
RC
1
1
0
D
CID
0 → CIE
HIGH Z
RD
1
1
0
0-F
DBNZ
RN - 1 → RN
HIGH Z
RN
1
1
0
0-F
DBNZ
MRP → B; RP + 1 → RP
MRP
RP
0
1
0
0-F
DBNZ
TAKEN: B → RP.1, MRP →
M(RP + 1) RP + 1
0
1
0
RP.0
NOT TAKEN: RP + 1 → RP
E
BCI
TAKEN: MRP → RP.0;
MRP
RP
0
1
0
0 → CI
NOT TAKEN: RP + 1 → RP
F
BXI
TAKEN: MRP → RP.0
MRP
RP
0
1
0
NOT TAKEN: RP + 1 → RP
0-F
RLXA
MRX → B, RX + 1 → RX
MRX
RX
0
1
0
0-F
RLXA
B → T; MRX → B; RX + 1 → RX M(RX + 1) RX + 1
0
1
0
0-F
RLXA
B, T → RN.0, RN.1
HIGH Z
RN
1
1
0
4
DADC
MRX + D + DF → DF, D
MRX
RX
0
1
0
4
DADC
DECIMAL ADJUST → DF, D
HIGH Z
RD
1
1
1
6
DSAV
RX - 1 → RX
HIGH Z
RP
1
1
0
6
DSAV
T → MRX; RX - 1 → RX
T
RX - 1
1
0
0
6
DSAV
D → MRX; RX - 1 → RX
D
RX - 2
1
0
0
SHIFT D RIGHT WITH CARRY
6
DSAV
D → MRX
D
RX - 3
1
0
0
7
DSMB
D - MRX - (NOT DF) → DF, D
MRX
RX
0
1
0
7
DSMB
DECIMAL ADJUST → DF, D
HIGH Z
RP
1
1
0
C
DACI
MRP + D + DF → DF, D;
RP + 1 → RP
MRP
RP
0
1
0
C
DACI
DECIMAL ADJUST → DF, D
HIGH Z
RP + 1
1
1
0
F
DSBI
D - MRP - (NOT DF) → DF, D;
MRP
RP
0
1
0
RP + 1 → RP
27
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