HMP8154 View Datasheet(PDF) - Renesas Electronics

Part Name

Description

Manufacturer

HMP8154

NTSC/PAL Encoders

Renesas Electronics 

HMP8154, HMP8156A

0

PAL SQUARE PIXEL

CLK2 = 29.50MHz

-10

NTSC OR PAL

RECTANGULAR PIXEL

CLK2 = 27.00MHz

-20

NTSC SQUARE PIXEL

-30

CLK2 = 24.54MHz

-40

-50

-60

0

1

2

3

4

5

6

FREQUENCY (MHz)

FIGURE 19A. FULL SPECTRUM

0

-0.5

-1.0

PAL SQUARE PIXEL

CLK2 = 29.50MHz

-1.5

-2.0

NTSC OR PAL

RECTANGULAR PIXEL

-2.5

CLK2 = 27.00MHz

-3.0

NTSC SQUARE PIXEL

CLK2 = 24.54MHz

-3.5

-4.0

0

0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6

FREQUENCY (MHz)

FIGURE 19B. PASS BAND

FIGURE 19. Cb AND Cr LOWPASS FILTER RESPONSE

Chrominance Modulation

The HMP8154/HMP8156A uses a numerically controlled

oscillator (NCO) clocked by CLK2 and a sine look up ROM to

generate the color subcarrier. The subcarrier from the ROM is

pre-scaled to generate the proper levels for the various video

standards. Prescaling outside the CbCr data path minimizes

color processing artifacts. The HMP8154/HMP8156A

modulates the filtered 8:8:8 chrominance data with the

synthesized subcarrier.

Subcarrier Phase

The SCH phase is 0 degrees after reset but then changes

monotonically over time due to residue in the NCO. In an

ideal system, zero SCH phase would be maintained forever.

In reality, this is impossible to achieve due to pixel clock

frequency tolerances.

If enabled, the HMP8154/HMP8156A resets the NCO

periodically to avoid an accumulation of SCH phase error.

The reset occurs at the beginning of each field to burst

phase sequence. The sequence repeats every 4 fields for

NTSC or 8 fields for PAL.

FN4343 Rev.5.00

August 20, 2009

Resetting the SCH phase every four fields (NTSC) or eight

fields (PAL) avoids the accumulation of SCH phase error at

the expense of requiring any NTSC/PAL decoder after the

encoder be able to handle very minor “jumps” (up to 2o) in

the SCH phase at the beginning of each four-field or eight-

field sequence. Most NTSC/PAL decoders are able to

handle this due to video editing requirements.

Composite Video Limiting

The HMP8154/HMP8156A adds the luminance and modulated

chrominance together with the sync, color burst, and optional

blanking pedestal to form the composite video data. If enabled

in the video processing register, the encoder limits the active

video so that it is always greater than one-eighth of full scale.

This corresponds to approximately one-half the sync height.

This allows the generation of “safe” video in the event

nonstandard YCbCr values are input to the device.

Closed Captioning

If enabled in the auxiliary data control register, the

HMP8154/HMP8156A generates closed captioning data on

specified scan lines. The captioning data stream includes clock

run-in and start bits followed by the captioning data. During

closed captioning encoding, the pixel and overlay inputs are

ignored on the scan lines containing captioning information.

The HMP8154/HMP8156A has two 16-bit registers containing

the captioning information. Each 16-bit register is organized as

two cascaded 8-bit registers. One 16-bit register (caption 21) is

read out serially during line 18, 21 or 22; the other 16-bit

register (caption 284) is read out serially during line 281, 284 or

335. The data registers are shifted out LSB first.

The bytes may be written in any order but both must be

written within one frame time for proper operation. If the

registers are not updated, the encoder resends the

previously loaded values.

The HMP8154/HMP8156A provides a write status bit for

each captioning line. The encoder clears the write status bit

to ‘0’ when captioning is enabled and both bytes of the

captioning data register have been written. The encoder sets

the write status bit to ‘1’ after it outputs the data, indicating

the registers are ready to receive new data.

Captioning information may be enabled for either line, both

lines, or no lines. The captioning modes are summarized in

Table 8.

Controlled Edges

The NTSC and PAL video standards specify edge rates and

rise and fall times for portions of the video waveform. The

HMP8154/HMP8156A automatically implements controlled

edge rates and rise and fall times on these edges:

1. Analog horizontal sync (rising and falling edges)

2. Analog vertical sync interval (rising and falling edges)

3. Color burst envelope

4. Blanking of analog active video

5. Overlay with internal mixing

6. Closed captioning information

Page 15 of 34

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