DSP56321 View Datasheet(PDF) - Freescale Semiconductor
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DSP56321 Datasheet PDF : 84 Pages
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AC Electrical Characteristics
Table 2-10. Host Interface Timings1,2,12 (Continued)
No.
Characteristic10
200 MHz
Expression
Min Max
220 MHz
Min Max
240 MHz
Min Max
275 MHz Uni
Min Max t
323 HAS deassertion to data strobe assertion4
0.0 — 0.0 — 0.0 — 0.0 — ns
324 Host data input setup time before write data
strobe deassertion6
4.95 — 4.5 — 4.13 — 4.0 — ns
325 Host data input hold time after write data
strobe deassertion6
1.65 — 1.5 — 1.38 — 1.23 — ns
326 Read data strobe assertion to output data
active from high impedance5
HACK assertion to output data active from high
impedance
1.65 — 1.5 — 1.38 — 1.23 — ns
327 Read data strobe assertion to output data
valid5
HACK assertion to output data valid
— 14.78 — 13.45 — 12.32 — 10.2 ns
328 Read data strobe deassertion to output data
high impedance5
HACK deassertion to output data high
impedance
— 4.95 — 4.5 — 4.13 4.0 — ns
329 Output data hold time after read data strobe
deassertion5
Output data hold time after HACK deassertion
1.65 — 1.5 — 1.38 — 1.23 — ns
330 HCS assertion to read data strobe
deassertion5
TC + 4.95
9.95 — 9.05 —
8.3
— 7.77 —
ns
331 HCS assertion to write data strobe
deassertion6
8
—
8
—
8
—
8
— ns
332 HCS assertion to output data valid
333 HCS hold time after data strobe deassertion4
—
17
—
16
—
15
—
14 ns
0.0 — 0.0 — 0.0 — 0.0 — ns
334 Address (HAD[0–7]) setup time before HAS
deassertion (HMUX=1)
2.31 — 2.1 — 1.93 — 1.76 — ns
335 Address (HAD[0–7]) hold time after HAS
deassertion (HMUX=1)
1.65 — 1.5 — 1.38 — 1.23 — ns
336 HA[8–10] (HMUX=1), HA[0–2] (HMUX=0),
HR/W setup time before data strobe assertion4
• Read
• Write
0
—
0
—
0
—
0
— ns
2.31 — 2.1 — 1.93 — 1.76 — ns
337 HA[8–10] (HMUX=1), HA[0–2] (HMUX=0),
HR/W hold time after data strobe deassertion4
1.65 — 1.5 — 1.38 — 1.23 — ns
338 Delay from read data strobe deassertion to
TC + 2.64 7.64 — 7.19 — 6.81 — 6.28 — ns
host request assertion for “Last Data Register”
read5, 7, 8
339 Delay from write data strobe deassertion to
1.5 × TC + 10.14 — 9.47 —
8.9
—
8.1
—
ns
host request assertion for “Last Data Register”
2.64
write6, 7, 8
340 Delay from data strobe assertion to host
request deassertion for “Last Data Register”
read or write (HROD=0)4, 7, 8
— 12.14 — 11.04 — 10.12 — 9.0 ns
341 Delay from data strobe assertion to host
request deassertion for “Last Data Register”
read or write (HROD=1, open drain host
request)4, 7, 8, 9
— 300.0 — 300.0 — 300.0 — 300.0 ns
Freescale Semiconductor
DSP56321 Technical Data, Rev. 11
2-15
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