MT41J128M View Datasheet(PDF) - Micron Technology
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MT41J128M Datasheet PDF : 214 Pages
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Table 90: Synchronous ODT Parameters
Symbol
ODTLon
ODTLoff
ODTH4
ODTH8
tAON
tAOF
Description
Begins at
ODT synchronous turn-on delay
ODT registered HIGH
ODT synchronous turn-off delay
ODT registered HIGH
ODT minimum HIGH time after ODT ODT registered HIGH or write regis-
assertion or WRITE (BC4)
tration with ODT HIGH
ODT minimum HIGH time after WRITE Write registration with ODT HIGH
(BL8)
ODT turn-on relative to ODTLon
completion
Completion of ODTLon
ODT turn-off relative to ODTLoff
completion
Completion of ODTLoff
Defined to
RTT(ON) ±tAON
RTT(OFF) ±tAOF
ODT registered LOW
ODT registered LOW
RTT(ON)
RTT(OFF)
Definition for All
DDR3 Speed Bins
CWL + AL - 2
CWL +AL - 2
4tCK
6tCK
See Table 56
(page 79)
0.5tCK ± 0.2tCK
Unit
tCK
tCK
tCK
tCK
ps
tCK
Figure 115: Synchronous ODT
T0
T1
T2
T3
T4
T5
T6
T7
T8
T9
T10
T11
T12
T13
T14
T15
CK#
CK
CKE
AL = 3
AL = 3
CWL - 2
ODT
ODTH4 (MIN)
ODTLoff = CWL + AL - 2
ODTLon = CWL + AL - 2
tAON (MIN)
tAOF (MIN)
RTT
RTT,nom
tAON (MAX)
tAOF (MAX)
Transitioning
Don’t Care
Note: 1. AL = 3; CWL = 5; ODTLon = WL = 6.0; ODTLoff = WL - 2 = 6. RTT,nom is enabled.
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