MT41J128M View Datasheet(PDF) - Micron Technology

Part Name

Description

Manufacturer

MT41J128M

DDR3 SDRAM

Micron Technology 

1Gb: x4, x8, x16 DDR3 SDRAM

Synchronous ODT Mode

ODT Off During READs

Because the device cannot terminate and drive at the same time, RTT must be disabled

at least one-half clock cycle before the READ preamble by driving the ODT ball LOW (if

either RTT,nom or RTT(WR) is enabled). RTT may not be enabled until the end of the post-

amble, as shown in the following example.

Note: ODT may be disabled earlier and enabled later than shown in Figure 117

(page 205).

PDF: 09005aef826aa906

1Gb_DDR3_SDRAM.pdf - Rev. L 03/13 EN

204

Micron Technology, Inc. reserves the right to change products or specifications without notice.

‹ 2006 Micron Technology, Inc. All rights reserved.

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