MT48LC1M16A1 View Datasheet(PDF) - Micron Technology
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Description
Manufacturer
MT48LC1M16A1 Datasheet PDF : 51 Pages
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operation that would result from the same fixed-
length burst with AUTO PRECHARGE. The disadvan-
tage of the PRECHARGE command is that it requires
that the command and address buses be available at the
appropriate time to issue the command; the advantage
of the PRECHARGE command is that it can be used to
truncate fixed-length or full-page bursts.
Full-page READ bursts can be truncated with the
BURST TERMINATE command, and fixed-length
16Mb: x16
IT SDRAM
READ bursts may be truncated with a BURST TERMI-
NATE command, provided that AUTO PRECHARGE
was not activated. The BURST TERMINATE command
should be issued x cycles before the clock edge at which
the last desired data element is valid, where x equals the
CAS latency minus one. This is shown in Figure 12 for
each possible CAS latency; data element n + 3 is the last
desired data element of a longer burst.
T0
T1
T2
T3
T4
T5
T6
CLK
COMMAND
READ
NOP
NOP
NOP
BURST
NOP
TERMINATE
NOP
X = 0 cycles
ADDRESS
BANK,
COL n
DQ
DOUT
n
CAS Latency = 1
DOUT
n+1
DOUT
n+2
DOUT
n+3
T0
T1
T2
T3
T4
T5
T6
CLK
COMMAND
READ
NOP
NOP
NOP
BURST
NOP
TERMINATE
NOP
ADDRESS
BANK,
COL n
X = 1 cycle
DQ
DOUT
n
DOUT
n+1
DOUT
n+2
DOUT
n+3
CAS Latency = 2
T0
T1
T2
T3
T4
T5
T6
T7
CLK
COMMAND
READ
NOP
NOP
NOP
BURST
NOP
TERMINATE
NOP
NOP
ADDRESS
BANK,
COL n
X = 2 cycles
DQ
DOUT
n
DOUT
n+1
DOUT
n+2
CAS Latency = 3
NOTE: DQM is LOW.
Figure 12
Terminating a READ Burst
DOUT
n+3
DON’T CARE
16Mb: x16 IT SDRAM
16MSDRAMx16IT.p65 – Rev. 5/99
18
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©1999, Micron Technology, Inc.
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