S25FL127S
Table 18. OTP Address Map
Region
Region 0
Region 1
Region 2
...
Region 31
Byte Address Range (Hex)
000
...
00F
010 to 013
014 to 01F
020 to 03F
040 to 05F
...
3E0 to 3FF
Contents
Initial Delivery State (Hex)
Least Significant Byte of
Cypress Programmed Random
Number
...
Cypress Programmed Random
Number
Most Significant Byte of
Cypress Programmed Random
Number
Region Locking Bits
Byte 10 [bit 0] locks region 0
from programming when = 0
...
Byte 13 [bit 7] locks region 31
from programming when = 0
All bytes = FF
Reserved for Future Use (RFU)
All bytes = FF
Available for User
Programming
All bytes = FF
Available for User
Programming
All bytes = FF
Available for User
Programming
All bytes = FF
Available for User
Programming
All bytes = FF
7.6 Registers
Registers are small groups of memory cells used to configure how the S25FL-S memory device operates or to report the status of
device operations. The registers are accessed by specific commands. The commands (and hexadecimal instruction codes) used for
each register are noted in each register description. The individual register bits may be volatile, non-volatile, or One Time
Programmable (OTP). The type for each bit is noted in each register description. The default state shown for each bit refers to the
state after power-on reset, hardware reset, or software reset if the bit is volatile. If the bit is non-volatile or OTP, the default state is
the value of the bit when the device is shipped from Cypress. Non-volatile bits have the same cycling (erase and program)
endurance as the main flash array.
Table 19. Register Descriptions
Register
Status Register 1
Configuration Register 1
Status Register 2
AutoBoot Register
Bank Address Register
ECC Status Register
ASP Register
ASP Register
Password Register
PPB Lock Register
PPB Lock Register
Abbreviation
SR1[7:0]
CR1[7:0]
SR2[7:0]
ABRD[31:0]
BRAC[7:0]
ECCSR[7:0]
ASPR[15:1]
ASPR[0]
PASS[63:0]
PPBL[7:1]
PPBL[0]
Type
Volatile
Volatile
RFU
Non-volatile
Volatile
Volatile
OTP
RFU
Non-volatile OTP
Volatile
Volatile
Read Only
Bit Location
7:0
7:0
7:0
31:0
7:0
7:0
15:1
0
63:0
7:1
0
Document Number: 001-98282 Rev. *I
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