S25FL256SDSBFIQ01 View Datasheet(PDF) - Cypress Semiconductor

Part Name

Description

Manufacturer

S25FL256SDSBFIQ01

128 Mbit (16 Mbyte), 256 Mbit (32 Mbyte) 3.0V SPI Flash Memory

Cypress Semiconductor 

S25FL128S, S25FL256S

5. Timing Specifications

5.1

Key to Switching Waveforms

Figure 5.1 Waveform Element Meanings

Input Valid at logic high or low High Impedance Any change permitted Logic high Logic low

Symbol

Output Valid at logic high or low High Impedance Changing, state unknown Logic high Logic low

Figure 5.2 Input, Output, and Timing Reference Levels

Input Levels

VIO + 0.4V

0.7 x VIO

Output Levels

0.85 x VIO

0.5 x VIO

Timing Reference Level

0.2 x VIO

- 0.5V

0.15 x VIO

5.2 AC Test Conditions

Figure 5.3 Test Setup

Device

Under

Test

CL

Table 5.1 AC Measurement Conditions

Symbol

Parameter

Min

Max

Unit

CL

Load Capacitance

30

pF

15 (4)

Input Rise and Fall Times

2.4

ns

Input Pulse Voltage

0.2 x VIO to 0.8 VIO

V

Input Timing Ref Voltage

0.5 VIO

V

Output Timing Ref Voltage

0.5 VIO

V

Notes:

1. Output High-Z is defined as the point where data is no longer driven.

2. Input slew rate: 1.5 V/ns.

3. AC characteristics tables assume clock and data signals have the same slew rate (slope).

4. DDR Operation.

Document Number: 001-98283 Rev. *I

Page 29 of 144

Share Link: