DSP16410C View Datasheet(PDF) - Agere -> LSI Corporation
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Description
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DSP16410C Datasheet PDF : 373 Pages
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DSP16410C Digital Signal Processor
Data Addendum
May 2001
6 Device Characteristics (continued)
6.3 Recommended Operating Conditions
Table 5. Recommended Operating Conditions
Maximum
Internal Clock
(CLK) Frequency
200 MHz
Minimum
Internal Clock
(CLK) Period T
5.0 ns
Junction
Temperature TJ (°C)
Min
Max
–40
120
Supply Voltage
VDD1, VDD1A (V)
Min
Max
1.5
1.65
Supply Voltage
VDD2 (V)
Min
Max
3.0
3.6
The ratio of the instruction cycle rate to the input clock frequency is 1:1 without the PLL and
((M + 2)/((D + 2) * f(OD))):1 with the PLL selected. The maximum input clock (CKI pin) frequency when the PLL
is not selected as the device clock source is 50 MHz. The maximum input clock frequency is 40 MHz when
the PLL is selected.
6.3.1 Package Thermal Considerations
The maximum allowable ambient temperature, TAMAX, is dependent upon the device power dissipation and is deter-
mined by the following equation:
TAMAX = TJMAX – PMAX x ΘJA
Where PMAX is the maximum device power dissipation for the application, TJMAX is the maximum device junction
temperature specified in Table 6, and ΘJA is the maximum thermal resistance in still-air-ambient specified in
Table 6. See Section 7.3 for information on determining the maximum device power dissipation.
Table 6. Package Thermal Considerations
Device Package
208 PBGA
208 PBGA
256 EBGA
256 EBGA
Parameter
Maximum Junction Temperature (TJMAX)
Maximum Thermal Resistance in Still-Air-Ambient (ΘJA)
Maximum Junction Temperature (TJMAX)
Maximum Thermal Resistance in Still-Air-Ambient (ΘJA)
Value
120
27
120
15
Unit
°C
°C/W
°C
°C/W
WARNING: Due to package thermal constraints, proper precautions in the user's application should be
taken to avoid exceeding the maximum junction temperature of 120 °C. Otherwise, the device
performance and reliability is adversely affected.
14
Agere Systems Inc.
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