RM7065A-350T View Datasheet(PDF) - PMC-Sierra

Part Name

Description

Manufacturer

RM7065A-350T

RM7065A™ Microprocessor with On-Chip Secondary Cache

PMC-Sierra 

RM7065A™ Microprocessor with On-Chip Secondary Cache Data Sheet

Preliminary

Figure 5 CP0 Registers

PageMask

5*

EntryHi

10*

47

EntryLo0

2*

EntryLo1

3*

TLB

(entries protected

from TLBWR)

0

LLAddr

17*

TagLo

28*

TagHi

29*

Info

7*

Index

0*

Random

1*

Wired

6*

PRId

15*

Config

16*

Context

4*

Count

9*

Status

12*

EPC

14*

Watch2

19*

ECC

26*

BadVAddr

8*

Compare

11*

Cause

13*

Watch1

18*

XContext

20*

CacheErr

27*

ErrorEPC

30*

Perf Counter

25*

Perf Ctr Cntrl

22*

Watch Mask

24*

IPLLO

18*

IPLHI

19*

IntControl

20*

Imp Error 1

26*

Imp Error 2

27*

Used for memory

management

* Register number

Used for exception

processing

Control Space Registers

4.12 Virtual to Physical Address Mapping

The RM7065A provides three modes of virtual addressing:

• user mode

• kernel mode

• supervisor mode

These modes allow system software to provide a secure environment for user processes. Bits in the

CP0 Status register determine which virtual addressing mode is used. In user mode, the RM7065A

provides a single, uniform virtual address space of 256 GB (2 GB in 32-bit mode).

When operating in the kernel mode, four distinct virtual address spaces, totalling 1024 GB (4 GB

in 32-bit mode), are simultaneously available and are differentiated by the high-order bits of the

virtual address.

The RM7065A processor also supports a supervisor mode in which the virtual address space is

256.5 GB (2.5 GB in 32-bit mode), divided into three regions based on the high-order bits of the

virtual address. Figure 6 shows the address space layout for 32-bit operations.

Proprietary and Confidential to PMC-Sierra, Inc and for its Customer’s Internal Use

19

Document ID: PMC-2010145, Issue 2

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