ADM9240 View Datasheet(PDF) - ON Semiconductor

Part Name

Description

Manufacturer

ADM9240

Low Cost Microprocessor System Hardware Monitor

ON Semiconductor 

ADM9240

Table X. Register 43h, INT Interrupt Mask Register 1 (Power-On Default = 00h)

Bit

Name

R/W

Description

0

+2.5 V

Read/Write A “1” disables the corresponding interrupt status bit for INT interrupt.

1

2

++V3.C3CVP1

Read/Write

Read/Write

A “1” disables the corresponding interrupt status bit for INT interrupt.

A “1” disables the corresponding interrupt status bit for INT interrupt.

3

+5 V

Read/Write A “1” disables the corresponding interrupt status bit for INT interrupt.

6–47

FATNem2 pDivisor

RReaead/Write A “1” disables the corresponding interrupt status bit for INT interrupt.

5

Reserved

Read/Write Power-On Default = 0.

6

FAN1

Read/Write A “1” disables the corresponding interrupt status bit for INT interrupt.

7

FAN2

Read/Write A “1” disables the corresponding interrupt status bit for INT interrupt.

4–5

FAN1 Divisor Table XRIe.aRegister 44h, INT Mask Register 2 (Power-On Default = 00h)

Bit

Name

R/W

Description

B0it

N+am12eV

RRead/Write A “1” disables the corresponding interrupt status bit for INT interrupt.

1

2

RVeCsCePr2ved

Read/Write

Read/Write

A “1” disables the corresponding interrupt status bit for INT interrupt.

Power-up default set to Low.

3

Reserved

Read/Write Power-up default set to Low.

4

CI

Read/Write A “1” disables the corresponding interrupt status bit for INT interrupt.

75

CRhaesseirsvIendt. Clear RReaead/Write Undefined.

0–66

RReseesrevrevded

RReaead/Write Undefined.

B7it

NRamESeET Enable

RRead/Write

A “1” enables the RESET function in the configuration register.

Table XII. Register 45h, Reserved Compatibility (Power-On Default = 00h)

Bit

Name

R/W

Description

0–07–7 RReseesrevrevded

Bit

Name

RReaead/Write

R

Reserved for Compatibility.

Table XIII. Register 46h, Chassis Intrusion Clear (Power-On Default = 00h)

Bit

Name Enable

RRea/W

Description

60–6 RReseesrevrevded

RReaead/Write Undefined (Power On Default = 00h)

57

RCeshearvsseids Int. Clear RReaead/Write A “1” outputs a minimum 20 ms active low pulse on the chassis intrusion

4

CI

Rea

pin. The register bit clears itself after the pulse has been output.

3

Reserved

Rea

2

ReservTeadble XIV. RegistRRereeaa4d7h, VID0–3/Fan Divisor Register (Power-On Default 0101(VID3–VID0))

0Bit +1N2amV e

RRea/dW

Description

B0it–3 NVamIDe

RRead

The VID[3:0] inputs from processor core power supplies to indicate the

operating voltage (e.g., 1.3 V to 3.5 V).

4–5

FAN1 Divisor

Read/Write Sets Counter Prescaler for FAN1 Speed Measurement

<5:4> = 00 – Divide by 1

7

FAN2

Rea

<5:4> = 01 – Divide by 2

6

FAN1

Rea

<5:4> = 10 – Divide by 4

5

Reserved

Rea

<5:4> = 11 – Divide by 8

4 6–7

TFemANp 2 Divisor

RReaead/Write Sets Counter Prescaler for FAN2 Speed Measurement

3

+5 V

Rea

<7:6> = 00 – Divide by 1

2

+3.3 V

Rea

<7:6> = 01 – Divide by 2

Read

<7:6> = 10 – Divide by 4

0

+2.5 V

Rea

<7:6> = 11 – Divide by 8

Bit

Name

R

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