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MPC2605ZP66R View Datasheet(PDF) - Motorola => Freescale

Part Name
Description
Manufacturer
MPC2605ZP66R Datasheet PDF : 30 Pages
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READ MISS (NORMAL BUS MODE)
Figure 3 is an illustration of MPC2605 pipeline depth with a
read miss followed by a read hit.
For illustration purposes the read miss is shown as a
3–1–1–1 response from memory. AACK for the second
access is not driven true until the cycle after the fourth TA of
the read miss. This is because the MPC2605 is not in control
of TA for the first access and must, therefore, wait until the
first access’ data tenure is complete before it can drive AACK
true for the read hit.
CLK
CPU BG
TS
A0 – A31
TBST
L2 CLAIM
AACK
CPU DBG
DBB
TA
DH0 – DH31,
DL0 – DL31
1
2
3
4
5
6
7
8
9
10
11
12
A
B
A1
A2
A3
A4
B1
B2
B3
B4
LEGEND
Signal driven to the MPC2605
Signal driven by the MPC2605
High–Z
Figure 3. Read Miss Followed by a Burst Read Hit for MPC603/604
MOTOROLA
MPC2605
17

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