MPC2605ZP66R View Datasheet(PDF) - Motorola => Freescale

Part Name

Description

Manufacturer

MPC2605ZP66R

Integrated Secondary Cache for PowerPC Microprocessors

Motorola => Freescale 

WRITE THROUGH BURST WRITE HIT

Figure 5 shows the fastest possible burst write hit to a

write–through mode L2 cache line, read miss or write miss

processing that replaces a clean line. For these operations

MPC2605 will not assert any signals on the 60X bus. A

cache line is considered write through if WT is asserted by

the processor when it asserts TS.

The speed at which a write–through operation completes

is solely dependent on the memory controller. The timing

shown here assumes that the memory controller has a write

buffer that can accept data this quickly.

CLK

CPU BG

TS

A0 – A31

TBST

WT

L2 CLAIM

AACK

CPU DBG

DBB

TA

DH0 – DH31,

DL0 – DL31

1

2

3

4

5

6

7

8

A

A1

A2

A3

A4

LEGEND

Signal driven to the MPC2605

Signal driven by the MPC2605

High–Z

Figure 5. Fastest Possible Write Through Burst Write Hit for MPC603/604

MOTOROLA

MPC2605

19

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