ADM9240 View Datasheet(PDF) - ON Semiconductor
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Description
Manufacturer
ADM9240 Datasheet PDF : 22 Pages
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ADM9240
MONITORING CYCLE TIME
The monitoring cycle begins when a one is written to the Start
Bit (Bit 0), and a zero to the INT_Clear Bit (Bit 3) of the Con-
figuration Register. INT_Enable (Bit 1) should be set to one to
enable the INT output. The ADC measures each analog input
ipnertautrunr,estsaerntisnogr.wAitsheVaCcChPm2 aenadsufrinemisheinntgiws ictohmthpeleotned-chthipe
tem-
result
is automatically stored in the appropriate value register. This
“round-robin” monitoring cycle continues until it is disabled by
writing a 0 to Bit 0 of the Configuration Register.
The counter controlling the multiplexer is driven by an on-chip
clock of nominally 22.5 kHz, so the entire measurement sequence
takes (nominally):
44.4 µs × 7 = 310.8 µs
This rapid sampling of the analog inputs ensures a quick re-
sponse in the event of any input going out of limits, unlike other
monitoring chips that employ slower ADCs.
When a monitoring cycle is started, monitoring of the fan speed
inputs begins at the same time as monitoring of the analog in-
puts. However, the two monitoring cycles are not synchronized
in any way, and the monitoring cycle time for the fan inputs is
dependent on fan speed and much slower than for the analog
inputs. For more details see the Fan Speed Measurement section.
If the op amp is powered from –12 V, precautions such as a
clamp diode to ground may be needed to prevent the base-
emitter junction of the transistor being reverse-biased in the
unlikely event that the output of the op amp should swing nega-
tive for any reason.
The positive output swing of the op amp should be as close to
+12 V as possible so that the maximum voltage can be obtained
from the transistor. Even if the op amp swings to the rail, the
maximum voltage from the emitter of the transistor will be
about 11.4 V. typical values for this condition would be:
Gain = 11.4/1.25 = 9.12 = 1 + R1/R2
1 = 82 , 2 = 10 ( e) R
kΩ R
Ω k nearest preferred valu
giving an actual gain of 9.2.
The
base
transistor should have a reasonably
current pulling down the output of
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have an
capable
oICf MdAisXsigpraetaintegr
than the maximum fan current and be
power due to the voltage dropped across
it
when the fan is not operating at full speed. Depending on the
fan parameters, some suitable devices would be 2N2219A,
2N3019 or ZTX450.
+12V
INPUT SAFETY
Scaling of the analog inputs is performed on-chip, so external
attenuators are normally not required. However, since the
power supply voltages will appear directly at the pins, it is advis-
able to add small external resistors in series with the supply
traces to the chip to prevent damaging the traces or power sup-
plies should an accidental short such as a probe connect two
power supplies together.
As the resistors will form part of the input attenuators, they will
affect the accuracy of the analog measurement if their value is
too high. The analog input channels are calibrated assuming an
external series resistor of 500 Ω, and the accuracy will remain
within specification for any value from zero to 1 kΩ, so a stan-
dard 510 Ω resistor is suitable.
The worst such accident would be connecting –12 V to +12 V—
a total of 24 V difference, with the series resistors this would
draw a maximum current of approximately 24 mA.
ANALOG OUTPUT
The ADM9240 has a single analog output from an unsigned
8-bit DAC which produces 0 V–1.25 V. The analog output
register defaults to FF during power-on reset, which produces
maximum fan speed. The analog output may be amplified and
buffered with external circuitry such as an op amp and transistor
to provide fan speed control.
NTEST_IN/AOUT
R1
R2
Figure 5. Analog Output Driving Fan
LAYOUT AND GROUNDING
Analog inputs will provide best accuracy when referred to the
GNDA pin. A separate, low impedance ground plane for analog
ground, which provides a ground point for the voltage dividers
and analog components, will provide best performance but is
not mandatory.
The poweCrMsAupply bypass, the parallel combination of 10 µF
Tt(oehlreseccttrroaonnlnysteiisccttoeordrstbhaeontutwaldeluehmna)Pveiannad9re0aan.s1doµngFarbo(ulcynehrdai,gmshhico)ubldypaalssos
capaci-
be lo-
cated as close as possible to the ADM9240.
nearest preferred va
Ga
A suitable drive circuit is given in Figure 5.
Care must be taken when choosing the op amp to ensure that its
input common-mode range and output voltage swing are suitable.
The op amp may be powered from the +12 V rail alone or from
±12 V. If it is powered from +12 V then the input common-
mode range should include ground to accommodate the mini-
mum output voltage of the DAC, and the output voltage should
swing below 0.6 V to ensure that the transistor can be turned
fully off.
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